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Radar and EW Sub-Systems Saurabh Sinha Thursday, 27 August 2015 Departement Elektriese, Elektroniese & Rekenaar-Ingenieurswese Department of Electrical,

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Presentation on theme: "Radar and EW Sub-Systems Saurabh Sinha Thursday, 27 August 2015 Departement Elektriese, Elektroniese & Rekenaar-Ingenieurswese Department of Electrical,"— Presentation transcript:

1 Radar and EW Sub-Systems Saurabh Sinha Thursday, 27 August 2015 Departement Elektriese, Elektroniese & Rekenaar-Ingenieurswese Department of Electrical, Electronic & Computer Engineering Kgoro ya Merero ya Mohlagase, Elektroniki & Bointšinere bja Khomphutha

2 Carl and Emily Fuchs Institute for Microelectronics CEFIM Founded in 1981 after receiving a grant from Carl and Emily Fuchs (1972 to 1981 Institute for Microstructures)

3 Director: Prof. Monuko du Plessis Senior Lecturer: Dr Saurabh Sinha Lecturers:Mr Johan Schoeman Mr Jannes Venter Researcher:Mr Alfons Bogalecki Project manager: Mr Gerrie Mostert Postgraduate students (PhD and MEng):15 CEFIM Carl and Emily Fuchs Institute for Microelectronics

4 Postgraduate Courses EIN 732 Introduction to Research Prof. JAG Malherbe EME 732 Analogue Electronic Design Prof. M. du Plessis EDG 780 Digital Electronic Design Dr S Sinha Mr PJ Venter Mr J Schoeman DPSS, CSIR EMK 732 Communication Electronics Prof. M. du Plessis EEY 890 Dissertation (MSc / MEng) EIN 990 Thesis (PhD / PhD (Eng))

5 Focus Areas & International Research Partners CMOS / Si device manufacture  Georgia Tech, Atlanta, USA RF MEMS and mm wave IC’s  IMT, Bucharest, Romania  Dresden University of Technology, Dresden, Germany  University of Electronic Sciences and Technology, China MEMS simulation and manufacture  IMTEK, University of Freiburg, Germany

6 Facilities  IC characterization equipment (RF lab)  Optical characterisation of sources and detectors  Semiconductor processing facility

7 Components of Electronic Warfare EW Support: intercept, identify and locate Electronic Protection: protect from friendly and enemy EW employment Electronic Attack: direct attack, jamming, chaff, flares, directed energy

8 A [CMP] Wafer Europractice (Belgium) MOSIS (USA) CMP (France) Europractice (Belgium) MOSIS (USA) CMP (France) AMS AMI TSMC UMC IHP IBM CSMC OMMIC ST IC FOUNDRIES AMS AMI TSMC UMC IHP IBM CSMC OMMIC ST IC FOUNDRIES Prototyping ○ IC Foundries CEFIM

9 Research Methodology Integrated-Circuit Level Modelling Received Signal Recovered Data Recovered Data gclreal1 gclimg1 VCO Voltage-Controlled Oscillator=inphse1 VCO Voltage-Controlled Oscillator1- quad1 tanh Trigonometric Function1 tanh Trigonometric Function 1e10 den(s) Transfer Fcn Pulse Generator1 Pulse Generator Product9 Product8 Product7 Product6 Product5 Product11 Product10 1 s Integrator1 1 s Integrator -K- Gain2 -K- Gain1 -K- Gain Constant3 Add5 Add3 Add1 Despreading DemodulationBit Recovery Phase Detector Mathematical/Ideal Modelling Revise Model Apply Findings TANNER EDA MATLAB

10 Research Tools Tanner EDA (~<2009) Mentor Graphics (>2008) –IC Flow –Euro 50/group_licence Cadence (~>2008) –AMS, Virtuoso, etc ADS (>2008) Europractice (Belgium) CMP (France) MOSIS (USA) Europractice (Belgium) CMP (France) MOSIS (USA) mname drain gate source bulk model [1=L] [w=W] [ad=Ad] [pd=Pd] [as=As] [ps=Ps] [nrd=Nrd] [nrs=Nrs] [rdc=Rdc] [rsc=Rsc] [rsh=Rsh] [geo=Geo] [M=m] [tables=T] 3 rd Party IP Blocks

11 System-Level Modelling ○ System-Level Tools & DRC Conceptual Design SIMULINK First-principles Communications Toolbox Signal Processing Toolbox

12 University of Pretoria ○ Short Courses Tanner Course ( with P.J. Venter ) –Product Registered –Events in 2007 & 2008 –Phase-out: 2009 RF IC Design Course ( with M. du Plessis ) –Product Registered OrCAD Layout Plus Course ( with S. Esterhuyse ) –Product Registered Future: Mentor Graphics (IC Flow & EldoRF) Course mm-Wave Radio Design Course ( with D. Foty )

13 University of Pretoria ○ Contract Research / Research Studies Grintek Ewation –1 Project (2 years) A 5 - 8 GHz SiGe CMOS Voltage Controlled Oscillator with Reduced Phase Noise Defence, Peace, Safety & Security (DPSS), CSIR –Armscor (Origin: DoD) –3 Projects (2 years each) A 5 GHz Voltage Controlled Oscillator (VCO) with 360° Variable Phase Outputs Reducing Jitter in High-Speed Serial Links A Linear SiGe BiCMOS LNA for Wide Band Receivers

14 A 5 – 8 GHz SiGe CMOS Voltage Controlled Oscillator (VCO) with Reduced Phase Noise (1)  Principal requirements:  High quality (Q) factor  Low 1 / f active noise component  Phase noise determined by:  Q-factor of the resonator  Q-factor of the varactor diode  Active device use for the oscillating transistor  Power supply noise  External tuning voltage supply noise

15 A 5 – 8 GHz SiGe CMOS VCO with Reduced Phase Noise (2) ParameterTypical ValueUnits Frequency Range4.0 – 8.0GHz Power Output5dBm SSB Phase Noise @ 100 KHz Offset -100dBc/Hz SSB Phase Noise @ 10 KHz Offset -75dBc/Hz Supply Current (Vcc +5V)75 (max)mA Tune Port Leakge Current (Vtune +15V) 10 (max)µA Frequency Drift Rate0.8MHz/ o C

16 Student: T.A.K. Opperman Submitted dissertation (Nov. 2008) LEDGER Programme A 5 GHz Voltage Controlled Oscillator (VCO) with 360° Variable Phase Outputs (1)

17 A 5 GHz VCO with 360° Variable Phase Outputs (2) This beam formation capability of antenna arrays is achieved by tuning the phase and amplitude of the transmitting signal, individually for each antenna element. (Note that no mechanical movement is required!) A beam-forming back end and corresponding antenna pattern (Gueorguiev et al., A CMOS transmitter for 802.11a WLAN with beam forming capability, Circuits and Systems 2005)

18 Simulation Results – Design spec. 1: VCO Simulation results show that this design specification has been achieved. Output Frequency (GHz) A 5 GHz VCO with 360° Variable Phase Outputs (3)

19 Circuit Realization – Design spec. 2 and 3: Phase shifter Gilbert Mixer used as a Variable Gain Amplifier (VGA). The current of the mixers are combined to obtain the vector sum. The differential architecture of the Mixer requires the transistors used as current sources to be closely matched. Gilbert Mixer Vector Sum 90° VGA + In-phase Quadrature Vcontrol_I Vcontrol_Q + - A 5 GHz VCO with 360° Variable Phase Outputs (4)

20 Simulation Results – Design spec. 2 and 3: Phase shifter The quadrature amplitude was held constant while the in-phase voltage amplitude was swept. The phase shift was then measured. A 5 GHz VCO with 360° Variable Phase Outputs (5)

21 A 5 GHz VCO with 360° Variable Phase Outputs (6)

22 A 5 GHz VCO with 360° Variable Phase Outputs (7)

23 A 5 GHz VCO with 360° Variable Phase Outputs (8)

24 A 5 GHz VCO with 360° Variable Phase Outputs (9)

25 A 5 GHz VCO with 360° Variable Phase Outputs (10)

26 High bandwidth Standards: –Sonet OC-192 (10 Gb/s) –USB 2.0 (480 Mb/s) –IEEE 802.3 (1 Gb/s) –IEEE 1394b (3.2 Gb/s) Component interconnects –RocketIO (2.5 Gb/s) –PCI-Express (2.5 Gb/s) Reducing Jitter in High-Speed Serial Links

27 A Linear SiGe BiCMOS LNA for Wide Band Receivers Technology Bandwidth (GHz) Gain (dB)NF (dB)S 11 (dB) Power (mW) SiGe BiCMOS3 – 10202.5 – 4.5< -1030 0.18 μm CMOS 3 – 1013 – 163.1 – 6< -811.9 GaAs HBT1 – 1022.53 – 3.6< -1055

28 mm-Wave Spectrum

29 mm-Wave Radio Design (1) Chip 1: RF SiGe HBT, IF CMOS; Chip 2 – Baseband analog & digital (all CMOS)

30 mm-Wave Radio Design (2)

31 mm-Wave Radio Design (3) NRF NEP Application KIC Programme (Short Course) Bi-Laterals Romania (Applied – Successful (R300,000/side/3_years)) China (Applied) Germany (Applied) Etc Gilgamesh Associates, LLC DARPA FP7: Call identified Special Technical Session – IEEE Africon 2009 Special Journal Publication

32 Publications (Focus area: RF IC) Publications200620072008Total Conferences36413 Journals4015 Posters0004 *Growth in postgraduate students *PDIs

33 Future Waves Undergraduate: EW-Series of final year projects –Emphasis on design Postgraduate: EW IC sub-systems –Research techniques  design methods –Prototyping and verification

34 Questions and Feedback Saurabh Sinha Carl & Emily Fuchs Institute for Microelectronics (CEFIM) 2-11 Dept. of Electrical, Electronic & Computer Engineering (www.ee.up.ac.za) University of Pretoria (www.up.ac.za) Tel: (012) 420-2950 Cell: (082) 777-6893 E-mail: ssinha@ieee.org | Web: http://cefim.ee.up.ac.za Hmm… I see…. IC Design


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