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Renesas Electronics America Inc. © 2010 Renesas Electronics America Inc. All rights reserved. A13C: Performing Digital Filtering on an MCU Kevin P King Senior Staff Applications Engineer 13 October 2010 Version 1.2
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2 © 2010 Renesas Electronics America Inc. All rights reserved. Kevin P King Education Electrical Engineering, University of Lowell (Edward B Van Dusen Award for Academic Achievement) Thirty years of Embedded Design Experience (x86, HC05, HC11, 8051, Philips XA, Atmel AVR, Hitachi, Mitsubishi, etc.... Five years of Emulator design for MetaLink COP8, 68HC05, 68HC11, 8051 (multi-vendors), National CR16, Hitachi H8/500, etc... Multiple Quality Awards for Embedded Software & Hardware Development. Specialty is Embedded System Design - MCU firmware & hardware Senior Staff Application Engineer Primary Tech Support for SH2A Focusing on Medical Segment and SH Family
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3 © 2010 Renesas Electronics America Inc. All rights reserved. Renesas Technology and Solution Portfolio Microcontrollers & Microprocessors #1 Market share worldwide * Analog and Power Devices #1 Market share in low-voltage MOSFET** Solutions for Innovation ASIC, ASSP & Memory Advanced and proven technologies * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 **Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis).
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4 © 2010 Renesas Electronics America Inc. All rights reserved. 4 Renesas Technology and Solution Portfolio Microcontrollers & Microprocessors #1 Market share worldwide * Analog and Power Devices #1 Market share in low-voltage MOSFET** ASIC, ASSP & Memory Advanced and proven technologies * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 **Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis). Solutions for Innovation
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5 © 2010 Renesas Electronics America Inc. All rights reserved. 5 Microcontroller and Microprocessor Line-up Superscalar, MMU, Multimedia Up to 1200 DMIPS, 45, 65 & 90nm process Video and audio processing on Linux Server, Industrial & Automotive Up to 500 DMIPS, 150 & 90nm process 600uA/MHz, 1.5 uA standby Medical, Automotive & Industrial Legacy Cores Next-generation migration to RX High Performance CPU, FPU, DSC Embedded Security Up to 10 DMIPS, 130nm process 350 uA/MHz, 1uA standby Capacitive touch Up to 25 DMIPS, 150nm process 190 uA/MHz, 0.3uA standby Application-specific integration Up to 25 DMIPS, 180, 90nm process 1mA/MHz, 100uA standby Crypto engine, Hardware security Up to 165 DMIPS, 90nm process 500uA/MHz, 2.5 uA standby Ethernet, CAN, USB, Motor Control, TFT Display High Performance CPU, Low Power Ultra Low Power General Purpose
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6 © 2010 Renesas Electronics America Inc. All rights reserved. 6 Microcontroller and Microprocessor Line-up Superscalar, MMU, Multimedia Up to 1200 DMIPS, 45, 65 & 90nm process Video and audio processing on Linux Server, Industrial & Automotive Up to 500 DMIPS, 150 & 90nm process 600uA/MHz, 1.5 uA standby Medical, Automotive & Industrial Legacy Cores Next-generation migration to RX High Performance CPU, FPU, DSC Up to 10 DMIPS, 130nm process 350 uA/MHz, 1uA standby Capacitive touch Up to 25 DMIPS, 150nm process 190 uA/MHz, 0.3uA standby Application-specific integration Embedded Security Up to 25 DMIPS, 180, 90nm process 1mA/MHz, 100uA standby Crypto engine, Hardware security Up to 165 DMIPS, 90nm process 500uA/MHz, 2.5 uA standby Ethernet, CAN, USB, Motor Control, TFT Display High Performance CPU, Low Power Ultra Low Power General Purpose
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7 © 2010 Renesas Electronics America Inc. All rights reserved. Innovation Arc Fault Circuit Interrupter
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8 © 2010 Renesas Electronics America Inc. All rights reserved. Position Renesas provides you a complete set of free development tools and a choice of low cost MCUs with ADC peripheral. Reliable Digital filtering that meets your system requirement can be achieved.
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9 © 2010 Renesas Electronics America Inc. All rights reserved. Agenda System Block Diagram – analog filter FIR vs IIR Sampling theorem Anti-aliasing Oversampling Triggering skew ADC interrupt overhead Decimation Fixed point and floating point principles Fixed point vs. floating point benchmark Summary Rev. 1.00DateMeeting Title
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10 © 2010 Renesas Electronics America Inc. All rights reserved. Example Filter Applications Rev. 1.00DateMeeting Title
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11 © 2010 Renesas Electronics America Inc. All rights reserved. Filter Applications – The Boxcar Filter Very common to perform a “running” average Sum n samples, scale the output (usually divide by n) Recalculate each time one new sample comes in Very simple FIR called boxcar All coefficients equal to 1 Example of 8 kHz sampling rate, 8 tap FIR
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12 © 2010 Renesas Electronics America Inc. All rights reserved. Filter Types - FIR Typically the gain = 1 Does not always have Decimation Decimation can be on front or back end X[n] – Input samples nD – Decimation Factor Y”[n] – Decimated Output B[n] – Coefficients (multiplies) Z -1 – Delay elements (storage array)
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13 © 2010 Renesas Electronics America Inc. All rights reserved. Filter Types - IIR In addition to a forward path there is a feedback path X[n] – Input samples Y k [n] – Output b k [n] – Feed forward Coefficients (multiplies) -a k [n] – Feedback Coefficients (multiplies) Z -1 – Delay elements (storage array)
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14 © 2010 Renesas Electronics America Inc. All rights reserved. FIR versus IIR* FIR Phase-linear Simple instructions, single loop Suited for Multi-rate (decimation or interpolation allows some calculations to be omitted) Desirable Numeric properties (finite-precision can usually be implemented using lower number of bits) Possible to implement with coefficients less then 1.0 May require more memory and calculations the IIR Some responses are just impractical to implement in FIR IIR Less memory and calculations for a given filtering charateristic Arithmetic errors compounded by feedback Harder to implement using fixed point Not as easy to do multi-rate (decimation and interpolation) Not phase-linear * http://www.dspguru.com/dsp/faqs/fir/basics and http://www.dspguru.com/dsp/faqs/iirhttp://www.dspguru.com/dsp/faqs/fir/basicshttp://www.dspguru.com/dsp/faqs/iir
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15 © 2010 Renesas Electronics America Inc. All rights reserved. Designing the Filter Programs like ScopeFIR, ScopeIIR or WinFilter simplify the task of designing a filter
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16 © 2010 Renesas Electronics America Inc. All rights reserved. Identifying the Noise Programs like ScopeDSP allows inputting ADC data and running FFT
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17 © 2010 Renesas Electronics America Inc. All rights reserved. Identifying the Noise The FFT clearly identifies a 1k,2K,4K and 8K component
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18 © 2010 Renesas Electronics America Inc. All rights reserved. Sampling Theorem Rev. 1.00DateMeeting Title Nyquist-Shannon Sampling Theorem “If a function x(t) contains no frequencies higher than B hertz, it is completely determined by giving its ordinates at a series of points spaced 1/(2B) seconds apart.” 1hertz Sometimes this is incorrectly stated: To not lose information you must sample at twice the highest frequency you are concerned with in a signal Simply stated: A signal can only be properly sampled if it contains no frequencies greater than one-half the sampling frequency
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19 © 2010 Renesas Electronics America Inc. All rights reserved. Aliasing Problem Record voice data and store Limit voice bandwidth to 4 kHz Sample at 8 kHz Problem - Audio contains energy above 4 kHz Anti-aliasing filter Adjust corner for 4 kHz Rev. 1.00DateMeeting Title
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20 © 2010 Renesas Electronics America Inc. All rights reserved. - 12 dB is only an attenuation of 1/4 Anti-aliasing filter
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21 © 2010 Renesas Electronics America Inc. All rights reserved. Anti-aliasing filter
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22 © 2010 Renesas Electronics America Inc. All rights reserved. Frequency Response of 8 Tap 4 kHz Filter -12dB line 20 dB attenuation at 8 kHz compared to 12 for analog filter
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23 © 2010 Renesas Electronics America Inc. All rights reserved. Improved 4 kHz Filter By using 14 taps notice the improved attenuation at 6 kHz
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24 © 2010 Renesas Electronics America Inc. All rights reserved. Sample at 32 kHz instead of 8 kHz Only signals 16 kHz or greater will alias Could use simple RC or no anti-aliasing filter Oversampling and digital filtering
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25 © 2010 Renesas Electronics America Inc. All rights reserved. Oversampling and digital filtering Decimate Results Store only 1 of 4 samples Only calculate filter at 8 kHz
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26 © 2010 Renesas Electronics America Inc. All rights reserved. Multi-rate and Decimation Rev. 1.00DateMeeting Title Temp cannot change more than 1 degree/ hour Required sampling rate for 1 degree logging Noise with 1 second period, averages out in 4 readings Sampling rate for noise x x x x x x x x x x x x x x x x Temperature x x x x
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27 © 2010 Renesas Electronics America Inc. All rights reserved. ADC Considerations - Skew Problems: Interrupt Skew – 32 kHz requires sampling every 31.25 uS Software start ADC possibility of sample skew Other interrupts in the system Long instructions required to complete Solutions: Possible - Make the start interrupt highest system priority Preferred - Use ADC system that can be triggered by timer – Some devices may have to loop a timer to ADC trigger
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28 © 2010 Renesas Electronics America Inc. All rights reserved. ADC Considerations - Overhead Problem: Interrupt Overhead Storing ADC Data – Assume ADC ISR takes 40 cycles – context save + data save and pointer adjust + context restore Sampling at 32 kHz BW to store data = 1.28 million cycles Solutions: Use a DMA controller 4-5 cycles or less per transfer CPU BW to store data <200 thousand cycles
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29 © 2010 Renesas Electronics America Inc. All rights reserved. SH7216 allows triggering ADC from MTU2 (timer) DMAC transfers data to buffer ADC Considerations - Benchmark Example HW assist to acquire/transfer data to buffer saves 7% CPU BW
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30 © 2010 Renesas Electronics America Inc. All rights reserved. Calculating the Filter Design 4 kHz, 8 tap, lowpass filter Sampling rate 32 kHz Passband 4 kHz Stopband 8 kHz Stopband attenuation 12 dB – actual 20 dB Passband ripple = 2 dB - actual 0.76 Coefficients: -0.074778857796693535 0.020358522095065112 0.200149797853876850 0.366925297165379800 0.200149797853876850 0.020358522095065112 -0.074778857796693535
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31 © 2010 Renesas Electronics America Inc. All rights reserved. Implementing the Filter Could calculate the filter as: result=0; for (index = 0; index < taps; index++) { result += data[index] * coeff[index]; } The problem is the coefficients are all fractional values
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32 © 2010 Renesas Electronics America Inc. All rights reserved. Options to Calculate the Filter Use an MCU with an FPU R32C – 32 Bit CISC General Purpose up to 50 MHz SH2A like SH7216 – High Performance RISC up to 200 MHz RX600 – High Performance CISC up to 100 MHz Use Floating Point Libraries Can be very slow Use Fixed Point Math A little more complicated than floating point
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33 © 2010 Renesas Electronics America Inc. All rights reserved. Floating Point Numbers Floating point value = (-1) sb + (1+Fraction) x 2 (exponent – bias) The exponent is expressed in biased form: e = E + bias Precision is function of fraction bits Floating supports a very large dynamic range 0313022 Significand part 23 bits (implied 1)Exponent 8 bitsS -2 8 2727 2626 2525 2424 23232 2121 2020 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 2 -9 2 -10 2 -11 2 -12 2 -13 2 -14 2 -15 2 -16 2 -17 2 -18 2 -19 2 -20 Radix point 2 -21 2 -22 2 -23 23 ParameterSingle Precision Double Precision Total bit Width 32bits64bits Sign bit1bit Exponent field 8bits11bits Significand23bits52bits Precision24bits53bits Bias+127+1023 Emax+127+1023 Emin-126+1024
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34 © 2010 Renesas Electronics America Inc. All rights reserved. Floating Point Hardware Single Precision Min Value = 5.88 x 10e-39, Max value = 3.4 x 10e+38 Double Precision Min Value = ~2.0 x 10e-308, Max value = ~2.0 x 10e+307 0313022 Significand part 23 bits (implied 1)Exponent 8 bitsS -2 8 2727 2626 2525 2424 23232 2121 2020 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 2 -9 2 -10 2 -11 2 -12 2 -13 2 -14 2 -15 2 -16 2 -17 2 -18 2 -19 2 -20 Radix point 2 -21 2 -22 2 -23 23 031 Significand part 32/52 bits (implied 1) 23232 2121 2020 32636251 Significand part 20/52 bits (implied 1) Exponent 11 bits S -2 12 2 11 2 10 2929 2828 2727 2626 2525 2424 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 2 -9 2 -10 2 -11 2 -12 2 -13 2 -14 2 -15 2 -16 2 -17 2 -18 2 -19 Radix point 52 2 -32 2 -33 2 -34 2 -35 2 -36 2 -37 2 -38 2 -39 2 -40 2 -41 2 -42 2 -43 2 -44 2 -45 2 -46 2 -47 2 -48 2 -49 2 -50 2 -51 2 -28 2 -29 2 -30 2 -31 2 -24 2 -25 2 -26 2 -27 2 -20 2 -21 2 -22 2 -23
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35 © 2010 Renesas Electronics America Inc. All rights reserved. Fraction value is shifted (multiplied) by a value to make an integer Example – Represent 19. 78 using 16 bit fixed point – 1 bit for the sign – 19 requires 5 bits in binary – 10 bits left to represent fraction – Multiply the value by 1024 (shift left 10) – Could allocate more bits for integer and less for fraction Example : Calculate a 4 tap box filter using fixed point Assume ADC samples are – 0x100 (256), 0x200 (512), 0x120(288), 0x150(336) Coefficients are all 0.25 Solution – Scale coefficients to be integers by multiplying by 4 (shift left 2) – Multiply coefficients time ADC values – 1*0x100 + 1 *0x200 + 1*0x120 + 1 *0x150 = 0x570 (1392) – Restore proper scaling (shift right 2) = 0x15C (348) Fixed Point S2424 23232 2121 2020 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 2 -9 2 -10
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36 © 2010 Renesas Electronics America Inc. All rights reserved. Precision Requirements How many bits of coefficient are required? Do not want round-off error to cause an LSB error For 10 bit ADC need 10 bits coefficient Each tap could accumulate error – Additional bits depends on number taps – 8 taps – add 3 LSB – 16 taps – add 4 LSB – Etc…
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37 © 2010 Renesas Electronics America Inc. All rights reserved. Pop Quiz: Assuming: 12 bit ADC, 7 tap FIR filter QUESTION: Is 16 bit Fixed Point enough resolution? 8 taps – add 3 LSB, for a total of 15 bits Don’t forget the sign bit! 16 bit total
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38 © 2010 Renesas Electronics America Inc. All rights reserved. Some Benchmark Results Using M16C/65 (16 bit, 32 MHz MCU ) 8 Tap Filter – 280 cycles (35 cycles per tap) 22 Tap Filer – 780 cycles (35 cycles per tap) 8 taps at 8 kHz = 2.2 million cycles (approximately 7% BW @ 32 MHz) Each tap calculation requires Multiply Sum Two Pointer Increments
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39 © 2010 Renesas Electronics America Inc. All rights reserved. A MAC Really Helps Really need a MAC M16C/R32C/RX have RMPA (software MAC) – M16C 8 Tap Filter – 120 cycles – M16C 22 Tap Filer – 240 cycles – R32C 8 Tap Filter – 32 cycles – R32C 22 Tap Filter – 65 cycles – RX 8 Tap Filter – ~47 cycles Device like SH7216 can perform a long MAC plus pointer increment in 4 cycles SH7216 can also do a 1 cycle floating point MAC (without pointer increment)
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40 © 2010 Renesas Electronics America Inc. All rights reserved. Circular Buffer Bottleneck Most DSPs can handle circular buffers, MCUs typically do not Inefficient to put pointer check in loop X0X1X2X3 C0C1C2C3 X1X2X3X4 C0C1C2C3 New Data Circular Buffer Implementation X4 Classical Implementation
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41 © 2010 Renesas Electronics America Inc. All rights reserved. Double Coefficient Loops X0X1X2X3 C0C1C2C3 C0C1C2C3 X4X1X2X3 C0C1C2C3 Loop1 C0C1C2C3 X4X5X2X3 C0C1C2C3 Loop2 Loop3 C0C1C2C3
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42 © 2010 Renesas Electronics America Inc. All rights reserved. IIR Filters
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43 © 2010 Renesas Electronics America Inc. All rights reserved. IIR Since round-off error in output feeds back IIR requires greater precision 16 bit precision typically sufficient for FIR IIR requires 32 bit precision 1 Floating point simplifies math
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44 © 2010 Renesas Electronics America Inc. All rights reserved. Why use IIR Design 5 kHz bandpass Sampling rate 44 kHz Center Frequency - 5 kHz Passband - 1 kHz Stopband attenuation 40 dB Passband ripple = 2 dB FIR filter requires 59 taps: IIR filter only requires 17 taps (13 non-zero) Forward coefficients – 1,0,-4,0,6,0,-4,0,1 Feedback coefficients -0.9027953874, 5.5279871696, -16.3895992764 29.9415524963, -36.6655508659, 30.7172057969 -17.2497536574. 5.9688037639
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45 © 2010 Renesas Electronics America Inc. All rights reserved. Some Benchmark Results Calculating the previous filter Using R32C with FPU – 150 Cycles (3 uS @ 50 MHz) – 12% BW if run @ 44 kHz SH2A with FPU – 94 cycles (0.47 uSec @ 200 MHz) – 2% BW if run @ 44 kHz Tools like the SH2A Signal Processing Library (SPL) help simplify the calculations
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46 © 2010 Renesas Electronics America Inc. All rights reserved. Summary System Block Diagram – analog filter FIR vs IIR Sampling theorem Anti-aliasing Oversampling Triggering skew ADC interrupt overhead Decimation Fixed point and floating point principles Fixed point vs. floating point benchmark Rev. 1.00DateMeeting Title
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47 © 2010 Renesas Electronics America Inc. All rights reserved. Questions?
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48 © 2010 Renesas Electronics America Inc. All rights reserved. Innovation Arc Fault Circuit Interrupter
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© 2010 Renesas Electronics America Inc. All rights reserved. 49 Thank You!
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© 2010 Renesas Electronics America Inc. All rights reserved. 50 Appendix: Additional Information
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51 © 2010 Renesas Electronics America Inc. All rights reserved. Resources ScopeFir and ScopeDSP http://www.iowegian.com/ http://www.dspguru.com/ The Scientist and Engineer's Guide to Digital Signal Processing, copyright ©1997-1998 by Steven W. Smith. For more information visit the book's website at: www.DSPguide.com C. E. Shannon, "Communication in the presence of noise", Proc. Institute of Radio Engineers, vol. 37, no. 1, pp. 10–21, Jan. 1949. Reprint as classic paper in: Proc. IEEE, vol. 86, no. 2, (Feb. 1998) C. E. ShannonReprint as classic paper in: Proc. IEEE, vol. 86, no. 2, (Feb. 1998) http://www.winfilter.20m.com Rev. 1.00DateMeeting Title
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