1. COMPUTER ORGANIZATION CSNB123

2. COMPUTER ORGANIZATION CSNB123 Expected Course Outcome #Course OutcomeCoverage 1Explain the concepts that underlie modern computer architecture, its evolution, functions and organization.  2Identify the best organization of a computer for achieving the best performance when asked to make a selection from the current market.  3Demonstrate the flow of an instruction cycle. 4Differentiate types of memory components in terms of its technology and usage. 5Convert integer and floating point numbers to its internal data representation. 6Construct a series of computer instructions to perform low-level processor operations. 7Explain the RISC and CISC computers, and single core and multi-core computers  May2014Systems and Networking2

3. COMPUTER ORGANIZATION CSNB123 Second Generation First Generation Evolution May 2014Systems and Networking3 Transistors Scale Integration ENIAC Von Neumann Machine UNIVACIBM

4. COMPUTER ORGANIZATION CSNB123 May 2014Systems and Networking4 ENIAC Von Neumann / Turing Machine UNIVACIBM

5. COMPUTER ORGANIZATION CSNB123 ENIAC Electronic Numerical Integrator And Computer Eckert and Mauchly University of Pennsylvania Trajectory tables for weapons Started 1943 Finished 1946  Too late for war effort Used until 1955 May 2014Systems and Networking5

6. COMPUTER ORGANIZATION CSNB123 ENIAC (2) Decimal (not binary) 20 accumulators of 10 digits Programmed manually by switches 18,000 vacuum tubes 30 tons 15,000 square feet 140 kW power consumption 5,000 additions per second May 2014Systems and Networking6

7. COMPUTER ORGANIZATION CSNB123 May 2014Systems and Networking7 ENIAC Von Neumann / Turing Machine UNIVACIBM

8. COMPUTER ORGANIZATION CSNB123 Von Neumann / Turing Machine Stored Program concept  Main memory storing programs and data  ALU operating on binary data  Control unit interpreting instructions from memory and executing Input and output equipment operated by control unit May 2014Systems and Networking8

9. COMPUTER ORGANIZATION CSNB123 Von Neumann / Turing Machine - Example May 2014Systems and Networking9 http://www.arcadefire.com/wp/wp-content/uploads/2010/10/turing11.jpg

10. COMPUTER ORGANIZATION CSNB123 Von Neumann Machine - Structure May 2014Systems and Networking10 Main Memory (M) I/O Equipment (I,O) Central Processing Unit (CPU) Arithmetic Logic Unit (CA) Program Control Unit (CC)

11. COMPUTER ORGANIZATION CSNB123 Von Neumann / Turing Machine (2) Princeton Institute for Advanced Studies  IAS Completed 1952 May 2014Systems and Networking11

12. COMPUTER ORGANIZATION CSNB123 IAS 1000 x 40 bit words  Binary number  2 x 20 bit instructions Set of registers (storage in CPU)  Memory Buffer Register  Memory Address Register  Instruction Register  Instruction Buffer Register  Program Counter  Accumulator  Multiplier Quotient May 2014Systems and Networking12

13. COMPUTER ORGANIZATION CSNB123 IAS – Structure May 2014Systems and Networking13 I/O Equipment (I,O) Main Memory (M) Arithmetic-logic Unit (ALU) ACMQ Arithmetic-logic Circuits MBR Program Control Unit IBRPC Control Circuits IR MAR Control Signals

14. COMPUTER ORGANIZATION CSNB123 IAS Computer - Example May 2014Systems and Networking14 http://www.comsci.us/history/images/ias.jpg

15. COMPUTER ORGANIZATION CSNB123 May 2014Systems and Networking15 ENIAC Von Neumann / Turing Machine UNIVACIBM

16. COMPUTER ORGANIZATION CSNB123 Universal Automatic Computer (UNIVAC) 1947 UNIVAC I Eckert-Mauchly Computer Corporation Late 1950 UNIVAC II Part of Sperry- Rand Corporation Faster & more memory May 2014Systems and Networking16

17. COMPUTER ORGANIZATION CSNB123 UNIVAC - Example May 2014Systems and Networking17 http://archive.computerhistory.org/resources/still-image/UNIVAC/Univac_1.charles_collingwood.1952.102645279.lg.jpg

18. COMPUTER ORGANIZATION CSNB123 May 2014Systems and Networking18 ENIAC Von Neumann / Turing Machine UNIVACIBM

19. COMPUTER ORGANIZATION CSNB123 IBM 1953 The 701 IBM 1 st stored program computer Scientific Calculations 1955 The 702 Business Applications 700/7000 series May 2014Systems and Networking19

20. COMPUTER ORGANIZATION CSNB123 IBM 701 May 2014Systems and Networking20 http://www-03.ibm.com/ibm/history/exhibits/701/images/141511_Large.jpg

21. COMPUTER ORGANIZATION CSNB123 IBM 702 May 2014Systems and Networking21 http://www.ed-thelen.org/comp-hist/BRL61-0396.jpg

22. COMPUTER ORGANIZATION CSNB123 IBM 700/7000 May 2014Systems and Networking22 https://upload.wikimedia.org/wikipedia/commons/thumb/b/b9/NASAComputerRoom7090. NARA.jpg/280px-NASAComputerRoom7090.NARA.jpg

23. COMPUTER ORGANIZATION CSNB123 May 2014Systems and Networking23

24. COMPUTER ORGANIZATION CSNB123 Transistors Made from Silicon (Sand) Invented 1947 at Bell Labs William Shockley et al. Replaced vacuum tubes Solid State device May 2014Systems and Networking24

25. COMPUTER ORGANIZATION CSNB123 Advantages of Transistors Smaller Cheaper Less heat dissipation May 2014Systems and Networking25

26. COMPUTER ORGANIZATION CSNB123 Transistors Based Computers Second generation machines NCR & RCA produced small transistor machines IBM 7000 DEC - 1957  Produced PDP-1 May 2014Systems and Networking26

27. COMPUTER ORGANIZATION CSNB123 Microelectronics Literally - “small electronics” A computer is made up of gates, memory cells and interconnections These can be manufactured on a semiconductor May 2014Systems and Networking27

28. COMPUTER ORGANIZATION CSNB123 Overall Generations of Computer May 2014Systems and Networking28 1946 - 1957 1958 - 1964 196519711971 - 1977 1978 - 1991 1991 Vacuum tube TransistorSmall scale integration Medium scale integration Large scale integration Very large scale integration Ultra large scale integration

29. COMPUTER ORGANIZATION CSNB123 Moore’s Law May 2014Systems and Networking29

30. COMPUTER ORGANIZATION CSNB123 Moore’s Law (2) Gordon Moore – co-founder of Intel Increased density of components on chip Since 1970’s development has slowed a little  Number of transistors doubles every 18 months May 2014Systems and Networking30

31. COMPUTER ORGANIZATION CSNB123 Moore’s Law (3) Cost of a chip has remained almost unchanged Higher packing density means shorter electrical paths, giving higher performance Smaller size gives increased flexibility Reduced power and cooling requirements Fewer interconnections increases reliability May 2014Systems and Networking31

32. COMPUTER ORGANIZATION CSNB123 Growth in CPU Transistor Count May 2014Systems and Networking32

33. COMPUTER ORGANIZATION CSNB123 IBM 360 series 1964 Replaced (& not compatible with) 7000 series First planned “family” of computers  Similar or identical instruction sets  Similar or identical O/S  Increasing speed  Increasing number of I/O ports (i.e. more terminals)  Increased memory size  Increased cost Multiplexed switch structure May 2014Systems and Networking33

34. COMPUTER ORGANIZATION CSNB123 DEC PDP-8 1964 First minicomputer (after miniskirt!) Did not need air conditioned room Small enough to sit on a lab bench $16,000  $100k+ for IBM 360 Embedded applications & OEM Bus Structure May 2014Systems and Networking34

35. COMPUTER ORGANIZATION CSNB123 DEC PDP-8 – Bus Structure May 2014Systems and Networking35

36. COMPUTER ORGANIZATION CSNB123 Semiconductor Memory 1970 Fairchild Size of a single core  i.e. 1 bit of magnetic core storage Holds 256 bits Non-destructive read Much faster than core Capacity approximately doubles each year May 2014Systems and Networking36

37. COMPUTER ORGANIZATION CSNB123 Intel May 2014Systems and Networking37 YearComputer Name Description 19714004 First microprocessor All CPU components on a single chip 4 bit 19728008 8 bit Both designed for specific applications 19748080 Intel’s first general purpose microprocessor

38. COMPUTER ORGANIZATION CSNB123 Speed Up Pipelining On board cache On board L1 & L2 cache Branch prediction Data flow analysis Speculative execution May 2014Systems and Networking38

39. COMPUTER ORGANIZATION CSNB123 Performance Balance Processor speed increased Memory capacity increased Memory speed lags behind processor speed May 2014Systems and Networking39

40. COMPUTER ORGANIZATION CSNB123 Logic and Memory Performance Gap May 2014Systems and Networking40

41. COMPUTER ORGANIZATION CSNB123 Logic and Memory Performance Gap - Solutions Increase number of bits retrieved at one time  Make DRAM “wider” rather than “deeper” Change DRAM interface  Cache Reduce frequency of memory access  More complex cache and cache on chip Increase interconnection bandwidth  High speed buses  Hierarchy of buses May 2014Systems and Networking41

42. COMPUTER ORGANIZATION CSNB123 I/O Devices Peripherals with intensive I/O demands Large data throughput demands Processors can handle this Problem moving data May 2014Systems and Networking42

43. COMPUTER ORGANIZATION CSNB123 I/O Devices - Solutions Caching Buffering Higher-speed interconnection buses More elaborate bus structures Multiple-processor configurations May 2014Systems and Networking43

44. COMPUTER ORGANIZATION CSNB123 Typical I/O Device Data Rates May 2014Systems and Networking44

45. COMPUTER ORGANIZATION CSNB123 Key is Balance Processor components Main memory I/O devices Interconnection structures May 2014Systems and Networking45

46. COMPUTER ORGANIZATION CSNB123 Improvements in Chip Organization and Architecture Increase hardware speed of processor  Fundamentally due to shrinking logic gate size More gates, packed more tightly, increasing clock rate Propagation time for signals reduced Increase size and speed of caches  Dedicating part of processor chip Cache access times drop significantly May 2014Systems and Networking46

47. COMPUTER ORGANIZATION CSNB123 Improvements in Chip Organization and Architecture (2) Change processor organization and architecture  Increase effective speed of execution  Parallelism May 2014Systems and Networking47

48. COMPUTER ORGANIZATION CSNB123 Problems with Clock Speed and Login Density Power  Power density increases with density of logic and clock speed  Dissipating heat RC delay  Speed at which electrons flow limited by resistance and capacitance of metal wires connecting them  Delay increases as RC product increases  Wire interconnects thinner, increasing resistance  Wires closer together, increasing capacitance Memory latency  Memory speeds lag processor speeds May 2014Systems and Networking48

49. COMPUTER ORGANIZATION CSNB123 Problems with Clock Speed and Login Density - Solution More emphasis on organizational and architectural approaches May 2014Systems and Networking49

50. COMPUTER ORGANIZATION CSNB123 Intel Microprocessor Performance May 2014Systems and Networking50

51. COMPUTER ORGANIZATION CSNB123 Increased Cache Capacity Typically two or three levels of cache between processor and main memory Chip density increased  More cache memory on chip Faster cache access Pentium chip devoted about 10% of chip area to cache Pentium 4 devotes about 50% May 2014Systems and Networking51

52. COMPUTER ORGANIZATION CSNB123 More Complex Execution Logic Enable parallel execution of instructions Pipeline works like assembly line  Different stages of execution of different instructions at same time along pipeline Superscalar allows multiple pipelines within single processor  Instructions that do not depend on one another can be executed in parallel May 2014Systems and Networking52

53. COMPUTER ORGANIZATION CSNB123 Diminishing Returns Internal organization of processors complex  Can get a great deal of parallelism  Further significant increases likely to be relatively modest Benefits from cache are reaching limit Increasing clock rate runs into power dissipation problem  Some fundamental physical limits are being reached May 2014Systems and Networking53

54. COMPUTER ORGANIZATION CSNB123 New Approach – Multiple Cores Multiple processors on single chip  Large shared cache Within a processor, increase in performance proportional to square root of increase in complexity May 2014Systems and Networking54

55. COMPUTER ORGANIZATION CSNB123 New Approach – Multiple Cores (2) If software can use multiple processors, doubling number of processors almost doubles performance So, use two simpler processors on the chip rather than one more complex processor May 2014Systems and Networking55

56. COMPUTER ORGANIZATION CSNB123 New Approach – Multiple Cores (3) With two processors, larger caches are justified  Power consumption of memory logic less than processing logic May 2014Systems and Networking56

57. COMPUTER ORGANIZATION CSNB123 x86 Evolution May 2014Systems and Networking57 x86 architecture dominant outside embedded systems Organization and technology changed dramatically Instruction set architecture evolved with backwards compatibility ~1 instruction per month added 500 instructions available See Intel web pages for detailed information on processors

58. COMPUTER ORGANIZATION CSNB123 x86 Evolution (2) VersionDescription 8080 first general purpose microprocessor 8 bit data path Used in first personal computer – Altair 8086 5MHz – 29,000 transistors much more powerful 16 bit instruction cache, prefetch few instructions 8088 (8 bit external bus) used in first IBM PC 1Mb 80286 16 Mbyte memory addressable up from 1Mb 80386 32 bit Support for multitasking 80486 sophisticated powerful cache and instruction pipelining built in maths co-processor May 2014Systems and Networking58

59. COMPUTER ORGANIZATION CSNB123 x86 - 8080 May 2014Systems and Networking59 http://www.antiquetech.com/pictures%20full-size/C8080A.jpg

60. COMPUTER ORGANIZATION CSNB123 x86 Evolution (3) VersionDescription Pentium Superscalar Multiple instructions executed in parallel Pentium Pro Increased superscalar organization Aggressive register renaming branch prediction data flow analysis speculative execution Pentium II MMX technology graphics, video & audio processing Pentium III Additional floating point instructions for 3D graphics Pentium 4 Note Arabic rather than Roman numerals Further floating point and multimedia enhancements May 2014Systems and Networking60

61. COMPUTER ORGANIZATION CSNB123 x86 - Pentium May 2014Systems and Networking61 http://www.notebookcheck.net/uploads/tx_nbc2/intel_pentium_e5700_03.jpg

62. COMPUTER ORGANIZATION CSNB123 x86 Evolution (4) VersionDescription Core First x86 with dual core Core 2 64 bit architecture Core 2 Quad 3GHz – 820 million transistors Four processors on chip May 2014Systems and Networking62

63. COMPUTER ORGANIZATION CSNB123 x86 – Core 2 May 2014Systems and Networking63 http://www.starbaseonline.com/hardware/Core2Duo.jpg

64. COMPUTER ORGANIZATION CSNB123 Additional Reference William Stallings, Computer Organization and Architecture: Designing for Performance, 8th. Edition, Prentice-Hall Inc., 2010 May2014Systems and Networking64

65. COMPUTER ORGANIZATION CSNB123 May2014Systems and Networking65 This teaching material is belongs to Systems and Networking Department College of Information Technology Universiti Tenaga Nasional (UNITEN) Malaysia 2014