1. ECE 3455 Electronics Summer 2003 MTWTh,2-4, E321 www.egr.uh.edu/courses/ece3455 Instructor: Dr. Reza Ashouri

2. Prerequisites ECE 2300 Credit for concurrent enrollment in ECE3337

3. Instructor: Dr. Reza Ashouri Office: D3, Room N357 Phone:34543 Email: mrashouri@uh.edumrashouri@uh.edu Office Hours: 1-2.00 pm, MTWTh

4. TA SARAVANAN EGAMBARAM Segambar@egr.uh.edu

5. ECE 3455 Course description (4 credits) ( Prerequisite: ECE 2300) An introduction to electronic devices such as op-amps, diodes, bipolar, and field-effect transistors Analysis and design of semiconductor circuits, single and multistage amplifiers Modeling and simulation of semiconductor circuits Laboratory and design projects.

6. Text A. Sedra, and K. C. Smith, Microelectronic Circuits, 4 th Ed.,

7. Chapters to be covered Chap. 1 Introduction to electronics 1.4 Amplifiers 1.5 Circuit models for amplifiers 1.6 Frequency Response of Amplifiers and Bode Plot ( See also chapter 7 section 7.1) Chap. 2 Operational amplifiers 2.1 The op-amp terminals 2.2 The ideal op-amp 2.3 Analysis of circuits containing ideal op-amps - the inverting configuration 2.4 Other applications of the inverting configuration 2.5 The noninverting configuration 2.6 Examples of op-amp circuits 2.7 Effect of finite open-loop gain and bandwidt 2.8 Large-signal operation of op-amps 2.9 DC imperfections

8. continued Chap. 3 Diodes 3.1 The ideal diode 3.2 Terminal characteristics of junction diodes 3.4 Analysis of diode circuits 3.5 The small-signal model and its applications 3.6 Operation in the reverse breakdown region - Zener diodes 3.7 Rectifier circuits 3.10 Power Supply Analysis and Design 3.11 Clipping, Clamping and Waveshaping 3.12 Waveform Generators ( See also ashouri lectures on Waveform Generation, and sections 12.4 and 12.5) 3.13 Precision Rectifiers( Section 12.9)

9. continued Chap. 4 Bipolar junction transistors 4.1 Physical structure and modes of operation 4.2 Operation of the npn transistor in the active mode 4.3 The pnp transistor 4.4 Circuit symbols and conventions 4.5 Graphical representation of transistor characteristics 4.6 Analysis of transistor circuits at DC 4.7 The transistor as an amplifier 4.8 Small-signal equivalent circuit models 4.9 Graphical analysis 4.10 Biasing the BJT for discrete circuit design 4.11 Basic single-stage BJT amplifier configurations 4.16 DC and AC Load-Lines 4.17 BJT Amplifier Design 4.18 FET (see chapter 5) 4.19 BJT and FET Amplifier Frequency Response (See Sections 7.3 and 7.4)

10. Quizzes Five Quizzes will be given during the course at the dates given in the schedule. Quizzes starts at the beginning of hour,sharp. Each quiz take s 20 to 30 minutes. The quizzes are based on class materials and homework. Quizzes and exams are closed book, closed note, only a single A4 crib sheet is allowed.

11. Exams We’ll have one mid-semester exam at: Sat. June 14, 1-2:30 pm (tentative) Final exam, 180 min, Th. July 3, 3-6 pm(tentative) There also 6 Lab exp.(Exp.0-5) with Instructi- on posted and due dates given in schedules. You should drop your report in the box outside the Lab.

12. Summer 1 Calendar 27Tuesday Classes begin. Classes meet Mondays through Thursdays. June 10Tuesday Last day to drop a course or withdraw without receiving a grade. 19Thursday Last day to drop a course or withdraw. July 1Tuesday Last day of classes. 2-3Wednesday - Thursday Final examination period. 3Thursday Official closing of Summer Session I.

13. Design Project Design project is an A project if is new. You need to obtain approval for A project by writing and submitting a proposal. Design project is a team work with 5 in each team. You should report names of your group by June 18. Project demos are in Monday June 30 and Tue. July 1. Formal report due date: July 1

14. Homeworks The Assigned Homeworks and their solutions are posted on the Web. Homeworks will be graded.

15. Grading Policy Quizzes 15% Exam 20% Final Exam 35% Informal reports 8% Formal report 10% Project 12%

16. Grade Point Rule A’s: 86-100 B’s: 74-85.99 C’s: 62-73.99 D’s: 50-61.99 F: below 50