1. Xilinx at Work in Printers

2. Agenda Market overview Printer market dynamics
Xilinx at work in printers
Putting it together
Summary
We will start by examining the market size and then discuss the dynamics of the printer market. After that, we will start at the low end of printers and examine the raw basics as a starting point for building up a typical system today. Key to this discussion is showing exactly where Xilinx FPGAs and CPLDs participate to provide important value to this market.

3. US Printer Market Overview
1998 US Printer Market by Technology
This is a DataQuest summary of the overall printer market for the United States. Ink Jet dominates, for sure, followed by laser printers.

4. Ink Jet Printer Market 1997 - 1998 Inkjet Printer Market Share
HP dominates in Ink Jet, today. Canon’s next. The players shown here have a significant advantage in this market, because they pretty much invented it.

5. Laser Printer Market Overview
Laser Printer Market Share
The same story holds for laser printers, with HP at the lead and Lexmark in second. Again, these players have been in the game a long time and been able to create specific technologies that provided distinct advantages for their customers, taking them to the forefront.

6. Printer Market Dynamics
Extremely competitive market
Total printer cost especially for Inkjet & Laser printers
Printing cost per page
Feature driven
Print quality - resolution
Support for various printing media - plain paper, photographic paper, glossy paper, overhead film, transfers etc.
Scalable fonts
Speed
Proprietary technology abounds
Resolution enhancement
Emerging & residual standards co-exist
Centronics interface
USB, Firewire
The printer market has been around a long, long time. Ink Jet and Laser products are at the forefront, but have become extremely feature driven and cost sensitive. Almost every manufacturer owns some kind of proprietary technology. Some of the technology is physical - like toner/fuser technologies or resolution improvement technologies. Other technologies include things like PostScript languages or the HP standard, PCL (Printer Control Language). However, there is still a remnant of earlier technology like the ubiquitous Centronix interface specification. Centronic impact printers have faded, but their original connector-pin specification remains. It has been updated to something called “BiTronix”, but it maintains similarity to the originals. Naturally, other technologies are arising to track modern PC standards like USB and Firewire.

7. Typical State of the Art Printer
Flash
EPROM
code/font
Resolution
Enhancement
Raster
Image
Processor
Processor
Engine
Interface
Print
Engine
SDRAM
System Control
&
I/O Interface
Clock
Distribution
Today’s state of the art printers deliver full features. This example includes connection to a PC, has a Printer Description Language support, resolution enhancement, Raster Image Procesing and still drives a basic Printer Engine Controller. The Engine control chip is typically an ASSP or ASIC. Lexmark, in collaboration with Conexant delivers standard Printer Interface solutions. They handle moving the paper with stepper motors, turning on / off printer nozzlesand other physical interface items.
Xilinx Solutions
Personal
Computer

8. Spartan Features and Benefits
Fully programmable I/O
Power Down feature
Boundary Scan
DLL (Digital Delay Lock Loop)
Distributed and block RAM
Advanced process technology
Provides interface to many I/O standards enabling easy interface between ASSPs and/or the processor
Reduces power consumption to allow conformance to Energy Star rating
Provides low cost and efficient manufacturing
Provides easy clock deskew among multiple devices
Easy to implement high speed memory buffer between ASSPs and/or the processor
Provides low cost with high performance for high volume applications
Features
Benefits
Programmable logic contains the features required to provide many benefits to the printer designer. ASSPs are not designed to interface to many types of processors or different memory types. The programmable I/O solves this problem by having fully programmable I/O to meet all of the major standards including LVTTL, CMOS, TTL, GTL, GTL+ etc.
Many consumers now require low power consumption as defined by the Energy Star ratings, the power down feature in the Spartan family allows conformance to a lower Energy Start rating. The CoolRunner family of PLDs are renowned for extremely low power consumption.
The DLLs provides the printer designer’s to easily manage the clock skew and clock distribution amongst multiple ASSPs.
In many printer designs, FPGAs are ideally suited to provide the management of data between the I/O port, the processor and the memories. The FPGA distributed and block RAM can be configured to provide an optimized and efficient datapath.
Of course, low cost is always a major concern in consumer devices. Xilinx FPGA’s have overcome the cost barrier typically associated with FPGA’s by using advanced process technology and designing FPGA’s that are now comparable to that of ASIC. In many instances, the FPGA provides lower cost than the equivalent ASIC, while retaining all of the benefits associated with programmable logic. Boundary scans also adds to to the overall cost reduction by allowing cost efficient high volume manufacturing.

9. Xilinx Solution for Low End Printers
Engine
Interface
Print
Engine
System Control
&
I/O Interface
Clock
Distribution
Xilinx Solutions
In this example, we identify the “bare bones” solution. The Personal Computer does just about everything. The System Controller and Clock Distribution are natural candidates for the programmable logic solutions. Again, the Engine Controller is typically an ASSP. Xilinx CPLDs make a natural interface point to the PC, and can capture data and respond to the various control signals needed to drive the Engine interface. Creating and delivering clocks and strobes to the Engine control, as well as interrupts to the PC are other tasks handled by the CPLD. A natural CPLD is the XC95144XL, which operates with 3.3V power and is designed for clock flexibility and data management capabilities.
Personal
Computer
Workload performed by PC
Performance bottlenecked by S/W features

10. Low End Printer Interface
Register
A[6 .. 0]
D[ ]
D[7 .. 0]
CTL8 .. 0]
Timing
State
Machine
RDn
WREn
WROn
RESETn
DMAREQn
IRQ0
IRQ1
IRQ2
CONNECTOR
ACT1284
XC95144XL
Switch
Debounce
Switches
LED
Drivers
LEDs
This image shows how to use a XC95144XL to implement the Centronics interface. The electrical interface is achieved with the TI ACT1284 bus interface. The PLD is used to buffer and split the Centronics data in to a address and data bus. The state machine is used to resolve interface timing between the IEEE 1284 and the processor or print engine. The XC9500 can also be used to drive LEDs and provide debounce for manual control switches.

11. Adding PDL Processor PC bottleneck relieved by processor
Flash
EPROM
code/font
Xilinx Solutions
Processor
Engine
Interface
Print
Engine
SDRAM
System Control
&
I/O Interface
Clock
Distribution
Adding a Page Description Language means offloading the PC from the data management tasks and increases the transmission bandwidth. The EPROM holds code and translation tables for the various fonts that will be needed to support the PDL. Remember that PostScript and HP PCL are typical PDLs in today’s market. There is also a need for bulk DRAM to capture buffers of data to be interpreted and printed. Naturally, the Xilinx Programmable Solution her participate in the interface to the PC, but also to the on board microprocessor and its various memories. For the expanded capability, a cost effective solution would be a Spartan XL FPGA.
PC bottleneck relieved by processor
PostScript or PCL today’s standards
Personal
Computer

12. PLD Value Proposition Programmable Logic glues processor,
Flash
EPROM
code/font
Programmable Logic glues processor,
bus, memory and PIF-LM1 together
Coldfire MCF5307
Conexant
PIF-LM1
Print
Engine
SDRAM
System Control
&
I/O Interface
Clock
Distribution
The purple boxes highlight the Spartan contribution. Note that the Engine interface is identified as the Conexant PIF chip, which the Spartan also interfaces to. Key to this proposition is recognizing that most ASSPs are specifically designed to interface to one particular microprocessor and one particular type of memory. The FPGAs handle the differences between the targeted processor/memories and the ultimately chosen ones. Lots of designers want the capabilities of the ASSPs, but must retain their own choice for processors, software and memories.
Xilinx Solutions
Personal
Computer
ASSPs

13. Adding RIP and RET Coldfire MCF5307 Programmable glue logic expands
Flash
EPROM
code/font
Resolution
Enhancement
Raster
Image
Processor
Conexant
PIF-LM1
Print
Engine
Coldfire MCF5307
System Control
&
I/O Interface
Clock
Distribution
SDRAM
ASSPs abound. Resolution enhancement and Raster image processing can be obtained by software alone, but there are chips that aid the process, and they are designed to interface directly to certain processors - but not all. Again, the FPGA proposition is to interface more ASSPs into the system.
Xilinx Solutions
ASSPs
Programmable glue logic expands
to allow additional features
Personal
Computer

14. Conexant PIF-LM1 ASSP
CSn
A[6:0]
Stepper Motor Interface 0
SMC0[5:0]
D[15:0]
Host
Interface
RDn
WRn
Stepper Motor Interface 1
SMC1[5:0]
RESETn
DMAREQ
DC Motor Interface
DCM[1:0]
Interrupt
Control
IRQ[2:0]
CHX
Encoder Interface
CHY
XIN
System
Timing
PDPOL
XOUT
PDCM[15:0]
Let’s look inside an ASSP - the Conexant PIF. Most of the right hand side is designed to directly attach to target items on the printer. The left hand side is focused on attaching to a specific processor. Naturally, all processors don’t have the same basic handshake - they don’t even order their address and data buses consistently. Attaching Xilinx programmable logic - FPGAs or CPLDs to the left hand side to assure that your processor - be it a RISC, CISC or embedded controller- maps neatly to the PIF ASSP.
Printhead Interface
HSC,HSM
PA[12:0]
DMAACK
Generic Algorithm Processor
Bit
Rotation
Block
DMAACK
GPIO
GPIO[8:0]

15. Xilinx Solution with PIF-LM1
Printhead
mono/color
Xilinx Solutions
ASSPs
Printhead
Driver
Paper Feed
Motor
Interface
Conexant
PIF-LM1
Stepper Motor
Driver
Host
Interface
DC/Stepper Motor Driver
To clarify that idea, here we see how the PIF interfaces through the purple boxes to the Host or General Purpose I/O devices (like switches, keyboards, etc.)
Printhead
Carrier Motor
Interface
Optional
Printhead Position
Optical Encoder
GPIO

16. Xilinx MFP Solution Xilinx Solutions ASSPs
Scanner Module
Print
Engine
Vertical
Print Motor
Scan Motor
Analog Scanner
Interface
Stepper Motor
Driver
Operator Panel
Module
Conexant
MFC1000
Conexant
PIF-LM1
Serial Peripheral
Interface
Expanding beyond just printers, we enter the world of Multi Function Peripherals (MFPs). This also increases the opportunity to find places to use Xilinx programmable logic. Here, we see them interfacing to the memories as well as various external I/O devices. Notice that the Conexant MFC1000 does do lots of direct interfacing to the system, but it cannot be so general as to handle everything that can be imagined. There’s always room for programmable logic!
Miscellaneous
I/O
SRAM/Flash
Memory
Memory
Interface
FAX Modem
Xilinx Solutions
ROM/Flash
Memory
ASSPs
DRAM

17. Putting it Together Xilinx Programmable Logic ties it altogether
Interfacing the internal printer bus to the various DRAMs, EPROMs, switches, panel indicators, etc.
Delivering the clocks and control strobes to the various functional blocks
Still keeping the Energy Star rating intact, with low power, low voltage interface functions
Keeping the price down and the features up
The words here speak for themselves. Remember that Xilinx programmable logic - FPGAs and CPLDs manage to interface all the internals of the printer together while still keeping your power budget and overall expenses very low!

18. Driving Down The Cost of FPGAs
Spartan-III
250K
Spartan-II
100K
System Gates
Spartan-XL
40K
$10
The major point of this slide is that for any given price level, Xilinx will be offering more density over time.
For example, while $10 can buy 100K gates in In the year 2001, $10 is projected to buy 200K gates. This increase in gates for a given price point is due to the application of Moore’s Law on a given pin count die.
The major user advantage to this increasing density is the larger number of more complex applications that are now possible with Spartan-II. Each increase in density has opened up new applications and with the advent of Spartan-II devices as large as 100,000 and 150,000 gates, applications such as printers, set top boxes, small office networking, and complex graphics add-on cards are now possible in a Spartan-II device selling for around ten dollars in high volumes.
30K

19. Xilinx Printer Support
Xilinx At Work web site
Market Overview
Application Notes
Using Xilinx Programmable Logic with High Speed Printers
White Papers
Xilinx at Work in Printers
The Spartan-II Family - The Complete Package
Glossary
FPGA Strategic Applications Group
Applications group dedicated to providing system level expertise
There is a considerable amount of support and documentation available from Xilinx including Applications Notes and White Papers. The Xilinx at Work web site also contains a wealth of information ranging from a market overview to a glossary of printer terms.
The FPGA Strategic Applications group can also be used to provide vertical market system solutions. This group is dedicated to providing system level expertise for various vertical markets, including printers, MP3 players, Digital Modems etc.

20. Summary
Xilinx CoolRunner, XC9500XL and Spartan FPGAs deliver cost effective solutions for a broad spectrum of Printer Solutions including
Ink jet printers
Laser printers
MFPs
Classic one-stop shopping with Xilinx Programmable Solutions
Xilinx programmable logic - XC9500XL, CoolRunner and Spartan XL FPGAs are cost effective solutions for ink jet printers, laser printers and Multi Function Peripherals. If this isn’t one stop shopping, I don’t know what is!