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1 Introduction to Information Security 0368-3065, Spring 2013 Lecture 9: Trusted computing architecture (cont.) Side-channel attacks Eran Tromer Slides credit: Dan Boneh, Stanford
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2 Trusted Computing Architecture (cont.)
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3 Recall: Protected Storage (sealing) Main Step: Encrypt data using RSA key on TPM TPM_Seal (some) Arguments: keyhandle: which TPM key to encrypt with KeyAuth: Password for using key `keyhandle’ PcrValues: PCRs to embed in encrypted blob data block: at most 256 bytes (2048 bits) Used to encrypt symmetric key (e.g. AES) Returns encrypted blob. Main point: blob can only be decrypted with TPM_Unseal when PCR-reg-vals = PCR-vals in blob. TPM_Unseal will fail othrwise
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4 Security? Resetting TPM after boot Attacker can disable TPM until after boot, then extend PCRs arbitrarily (one-byte change to boot block ) [Kauer 07] Software attack: send TPM_Init on LPC bus allows calling TPM_Startup again (to reset PCRs) Simple hardware attack: use a wire to connect TPM reset pin to ground Once PCRs are reset, they can be extended to reflect a fake configuration. Rollback attack on encrypted blobs e.g. undo security patches without being noticed. Can be mitigated using Data Integrity Regs (DIR) Need OwnerPassword to write DIR
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5 Better root of trust DRTM – Dynamic Root of Trust Measurement AMD: skinit Intel: senter Atomically does: Reset CPU. Reset PCR 17 to 0. Load given Secure Loader (SL) code into I-cache Extend PCR 17 with SL Jump to SL BIOS boot loader is no longer root of trust Avoids TPM_Init attack: TPM_Init sets PCR 17 to -1
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Attestation 9
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10 Attestation: what it does Goal: prove to remote party what software is running on my machine. Good applications: Bank allows money transfer only if customer’s machine runs “up-to-date” OS patches. Enterprise allows laptop to connect to its network only if laptop runs “authorized” software Quake players can join a Quake network only if their Quake client is unmodified. DRM: MusicStore sells content for authorized players only.
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11 Attestation: how it works Recall: EK private key on TPM. Cert for EK public-key issued by TPM vendor. Step 1: Create Attestation Identity Key (AIK) Details not important here AIK Private key known only to TPM AIK public cert issued only if EK cert is valid
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12 Attestation: how it works Step 2: sign PCR values (after boot) Call TPM_Quote (some) Arguments: keyhandle: which AIK key to sign with KeyAuth: Password for using key `keyhandle’ PCR List: Which PCRs to sign. Challenge: 20-byte challenge from remote server Prevents replay of old signatures. Userdata: additional data to include in sig. Returns signed data and signature.
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13 Attestation: how it (should) work Remote Server PC TPM OS App Generate pub/priv key pair TPM_Quote(AIK, PcrList, chal, pub-key) Obtain certs Attestation Request (20-byte challenge) (SSL) Key Exchange using Cert Validate : 1.Certs 2.PCR vals 3.Challenge Communicate with app using SSL tunnel Attestation must include key-exchange App must be isolated from rest of system
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15 Attesting to VMs: Terra [SOSP’03] TVMM Provides isolation between attested applications application: secure login into a corporate network
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16 Nexus OS (Sirer et al. ’06) Problem: attesting to hashed application/kernel code Too many possible software configurations Better approach: attesting to properties Example: “application never writes to disk” Supported in Nexus OS (Sierer et al. ’06) General attestation statements: “TPM says that it booted Nexus, Nexus says that it ran checker with hash X, checker says that IPD A has property P”
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17 3. TPM Compromise Suppose one TPM Endorsement Private Key is exposed Destroys all attestation infrastructure: Embed private EK in TPM emulator. Now, can attest to anything without running it. Certificate Revocation is critical for TCG Attestation.
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18 4. Private attestation Attestation should not reveal platform ID. Recall Intel CPU-ID fiasco. Private attestation: Remote server can validate trustworthiness of attestation … but cannot tell what machine it came from. TCG Solutions: Privacy CA: online trusted party Group sigs: privacy without trusted infrastructure
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19 Side channel attacks
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20 Cryptographic algorithms Model: Formal security definitions (CPA, CCA1, CCA2, …) Well-studied algorithms (RSA, AES, DES, …) Algorithmic attacks are believed infeasible. Input: (plaintext, key) Output (ciphertext)
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21 ENGULF [Peter Wright, Spycatcher, p. 84] In 1956, a couple of Post Office engineers fixed a phone at the Egyptian embassy in London.
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22 ENGULF (cont.) “The combined MI5/GCHQ operation enabled us to read the Egyptian ciphers in the London Embassy throughout the Suez Crisis.”
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23 Side-channel leakage Even if the software is perfect… electromagneticacoustic probing cache optical power frequency time
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25 The sound of GnuPG RSA signatures
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26 What’s the sound of a key encrypting if someone’s there to hear?
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27 Software-based side channels
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28 Cloud Computing (Infrastructure as a Service) Instant virtual machines
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29 Public Clouds (Amazon EC2, Microsoft Azure, Rackspace Mosso) Instant virtual machines... for anyone
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30 Virtualization Instant virtual machines... for anyone …on the same hardware.
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31 Virtualization What if someone running on that hardware is malicious?
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32 Virtualization: textbook description Hardware Virtual machine manager Process OS Virtual memory
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33 Cross-talk through architectural channels Hardware Virtual machine manager Process OS Virtual memory
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35 Cross-talk through architectural channels Hardware Virtual machine manager Process OS Virtual memory Contention for shared hardware resources
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36 Cross-talk through architectural channels Hardware Virtual machine manager OS Virtual memory cache Contention for shared hardware resources Example: contention for CPU data cache AttackerVictim
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37 Cross-talk through architectural channels Hardware Virtual machine manager OS Virtual memory cache Contention for shared hardware resources Example: contention for CPU data cache AttackerVictim <1 ns latency
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38 Cross-talk through architectural channels Hardware Virtual machine manager OS Virtual memory cache Contention for shared hardware resources Example: contention for CPU data cache AttackerVictim <1 ns latency
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39 Cross-talk through architectural channels Hardware Virtual machine manager OS Virtual memory cache Contention for shared hardware resources Example: contention for CPU data cache AttackerVictim <1 ns latency~100 ns latency DRAM
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40 Cross-talk through architectural channels Hardware Virtual machine manager OS Virtual memory cache Contention for shared hardware resources Example: contention for CPU data cache leaks memory access patterns. AttackerVictim <1 ns latency~100 ns latency
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41 Cross-talk through architectural channels Hardware Virtual machine manager OS Virtual memory cache Contention for shared hardware resources Example: contention for CPU data cache leaks memory access patterns. This is sensitive information! Can be used to steal encryption keys in few milliseconds of measurements. AttackerVictim
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44 Cache attacks CPU core contains small, fast memory cache shared by all applications. Attacker app Victim app CPU Slow DRAM main memory secret key Contention for this shared resources mean Attacker can observe slow-down when Victim accesses its own memory. From this, Attacker can deduce the memory access patterns of Victim. The cached data is subject to memory protection… cache But the metadata leaks information about memory access patterns: addresses and timing.
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45 char p[16], k[16]; // plaintext and key int32 Col[4]; // intermediate state const int32 T0[256],T1[256],T2[256],T3[256]; // lookup tables... /* Round 1 */ Col[0] T0[p[ 0] © k[ 0]] T1[p[ 5] © k[ 5]] T2[p[10] © k[10]] T3[p[15] © k[15]]; Col[1] T0[p[ 4] © k[ 4]] T1[p[ 9] © k[ 9]] T2[p[14] © k[14]] T3[p[ 3] © k[ 3]]; Col[2] T0[p[ 8] © k[ 8]] T1[p[13] © k[13]] T2[p[ 2] © k[ 2]] T3[p[ 7] © k[ 7]]; Col[3] T0[p[12] © k[12]] T1[p[ 1] © k[ 1]] T2[p[ 6] © k[ 6]] T3[p[11] © k[11]]; Example: breaking AES encryption via address leakage ( NIST FIPS 197; used by WPA2, IPsec, SSH, SSL, disk encryption, …) lookup index = plaintext key Complications: Multiple indices per cache line Uncertain messages Noise Requires further cryptographic and statistical analysis. How to learn addresses?
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46 Associative memory cache DRAM cache memory block (64 bytes) cache line (64 bytes) cache set (4 cache lines)
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47 DRAM cache Victim’s memory T0
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48 DRAM cache Attacker memory T0 Detecting victim’s memory accesses
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49 Measurement technique Attacker can exploit cache-induced crosstalk as an input or as an output: Effect of the cache on the victim Effect of victim on the cache Attacker Victim Attacker Victim
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50 Measuring effect of cache on encryption (cache timing attack) : Attacker manipulates cache states and measures effect on victim’s running time. DRAM cache T0 Attacker memory 1. Victim’s data fully cached 2. Attacker evicts victim’s block 3. Attacker times the victim’s next run. Slowdown?
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51 Measuring effect of encryption on cache: Attacker checks which of its own data was evicted by the victim. DRAM cache Attacker memory 1. Fill cache with attacker’s data T0
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52 Measuring effect of encryption on cache: Attacker checks which of its own data was evicted by the victim. DRAM cache Attacker memory 2. Trigger a single encryption 1. Fill cache with attacker’s data T0
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53 Measuring effect of encryption on cache: Attacker checks which of its own data was evicted by the victim. DRAM cache Attacker memory 2. Trigger a single encryption 3. Access attacker memory again and see which cache sets are slow 1. Fill cache with attacker’s data T0
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54 Experimental results [Osvik Shamir Tromer 05] [Tromer Osvik Shamir 09] Attack on OpenSLL AES encryption library call: Full key extracted from 13ms of measurements (300 encryptions) Attack on an AES encrypted filesystem (Linux dm-crypt): Full key extracted from 65ms of measurements (800 I/O ops) Measuring a “black box” OpenSSL encryption on Athlon 64, using 10,000 samples. Horizontal axis: evicted cache set. Vertical axis: p[0] (left), p[5] (right). Brightness: encryption time (normalized) Secret key byte is 0x00Secret key byte is 0x50
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55 Extension: “Hyper Attacks” Obtaining parallelism: –HyperThreading (simultaneous multithreading) –Multi-core, shared caches, cache coherence –(Also: interrupts, scheduler) Attack vector: –Monitor cache statistics in real time –Encryption process is not communicating with anyone (no I/O, no IPC). –No special measurement equipment –No knowledge of either plaintext of ciphertext
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56 “Hyper Attack” attack on AES (independent process doing batch encryption of text): Recovery of 45.7 key bits in one minute. Experimental results [Osvik Shamir Tromer 05] [Tromer Osvik Shamir 09]
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57 Other architectural attacks Covert channels [Hu ’91, ‘92] Hardware-assisted – Power trace [Page ’02] Timing attacks via internal collisions [Tsunoo Tsujihara Minematsu Miyuachi ’02] [Tsunoo Saito Suzaki Shigeri Miyauchi ’03] Model-less timing attacks [Bernstein ’04] RSA [Percival ’05] Exploiting the scheduler [Neve Seifrert ’07] Instruction cache Aciicmez ’07] –Exploits difference between code paths –Attacks are analogous to data cache attack Branch prediction [Aciicmez Schindler Koc ’06–’07] –Exploits difference in choice of code path –BP state is a shared resource ALU resources [Aciicmez Seifert ’07] –Exploits contention for the multiplication units Many followups
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58 Example: attacks on RSA MUL SQR time measurement ALU multiplier attack [Aciicmez Seifert 2007] time cache set Cache attack using HyperThreading [Percival 05]
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59 Square-and-multiply exponentiation in RSA
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60 Implications?
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61 Implications Multiuser systems In-browser code (e.g., Java applets, JavaScript, Google Native Client, ActiveX, managed.NET, Silverlight) Mobile apps Digital right management The trusted path is leaky (even if verified by TPM attestation, etc.) Remote network attacks Virtual machines
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63 Architectural attacks in cloud computing: difficulties How can the attacker reach a target VM? How to exploit it? Practical difficulties: –Core migration –Extra layer of page-table indirection –Coarse hypervisor scheduler –Load fluctuations –CPU model variability –Power saving –TLB misses –Speculative execution Is the “cloud” really vulnerable?
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64 Hey, You, Get Off of My Cloud! Exploring Information Leakage in Third-Party Compute Clouds Demonstrated, using Amazon EC2 as a study case: Cloud cartography Mapping the structure of the “cloud” and locating a target on the map. Placement vulnerabilities An attacker can place his VM on the same physical machine as a target VM (40% success for a few dollars). Cross-VM side-channels and exfiltration Once VMs are co-resident, information can be exfiltrated across VM boundary. All via standard customer capabilities, using our own VMs to simulate targets. We believe these vulnerabilities are general and apply to most vendors. [Ristenpart Tromer Shacham Savage 09]
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67 Achieving co-residence Overall strategy: –Derive target’s creation parameters –Create similar VMs until co-residence is detected. Improvement: –Target fresh (recently-created) instances, exploiting EC2’s sequential assignment strategy –Conveniently, one can often trigger new creation of new VMs by the victim, by inducing load (e.g., RightScale). Success in hitting a given (fresh) target: ~40% for a few dollars Reliable across EC2 zones, accounts and times of day.
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68 Detecting co-residence EC2-specific: –Internal IP address are close Xen-specific: –Obtain and compare Xen Dom0 address Generic: –Network latency –Cross-VM architectural channels: send HTTP requests to target and observe correlation with cache utilization
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69 Exploiting co-residence: cross-VM attacks Measuring VMs load (average/transient) Estimating web server traffic Robust cross-VM covert channel Detecting keystroke timing in an SSH session across VMs (on a similarly-configured Xen box) → keystroke recovery [Song Wagner Tian 01] –Stealing ElGamal decryption keys from coresident GnuPG/libgcrypt [Zhang Juels Reiter Ristenpart 2012] http requests per minute 050100200 measurement
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