1. Nick McKeown CS244 Lecture 7 Valiant Load Balancing

2. Simple Model of US Backbone 2

3. Designing a Backbone Network 3 1.Hard to measure current traffic matrix. -Harder still to estimate future traffic matrices. 1.Hard to know which traffic matrices can be supported. -Harder still under link and node failures.

4. The Problem 4 1 2 3 N … 4 r1r1 r4r4 r3r3 r2r2 POPs in big cities Q: How capacity to provision between two POPs?

5. The Problem 5 1 2 3 N … 4 r1r1 r4r4 r3r3 r2r2

6. 6 In Out r r r r r r Router capacity = Nr Switch capacity = N 2 r 100% Throughput in a Mesh ? ? ? ? ? ? ? ? ? r r r r r r r r r r r r r

7. Questions How would we provision the links if we know the traffic matrix? What is the cost of not knowing the traffic matrix? 7

8. Valiant Load Balancing 8 1 2 3 N … 4 r r r r 2r/N

9. 9 Outline for Today 1. Basic idea of load-balancing 2. Packet mis-sequencing 3. An optical switch fabric

10. 10 R In Out R R R R R R/N If Traffic Is Uniform R R

11. 11 Real Traffic is Not Uniform R In Out R R R R R R/N R R R R R R R R R ? Can we make traffic “sufficiently uniform” to make the problem trivial?

12. 12 Out R R R R/N VLB Switch Load-balancing stageForwarding stage In Out R R R R/N R R R 100% throughput for weakly mixing traffic (Valiant, C.-S. Chang)

13. 13 Out R R R R/N In R R R R/N 1 1 2 2 3 3 VLB Switch

14. 14 Out R R R R/N In R R R R/N 3 3 2 2 1 1 VLB Switch

15. 15 Out R R R In R R R R/N Intuition: 100% Throughput Arrivals to second mesh: Capacity of second mesh: Second mesh: arrival rate < service rate [C.-S. Chang] R/N

16. 16 Another way of thinking about it 1 N 1 N 1 NExternal Outputs Internal Inputs External Inputs Load-balancing cyclic shift Switching cyclic shift Interesting properties: 100% throughput, no arbiter (but 2x switching capacity) No part of the system need operate faster than the line rate

17. Performance 1.What are the performance tradeoffs between a scheduler and a load-balanced design? 2.How can a load-balanced switch have lower loss than an OQ switch? 3.“I’m surprised that no one came up with the idea earlier” 17

18. What you said My favorite line in the paper is the following: "If it is possible to build a packet switch with 100% throughput that has no scheduler, no reconfigurable switch fabric, and buffer memories operating without speedup, where does the packet switching actually take place?" The answer of course in the VOQs…” 18

19. 19 Outline 1. Basic idea of load-balancing 2. Packet mis-sequencing 3. An optical switch fabric

20. What you said “[I]f packet mis-sequencing is such a performance hit due to the way TCP is designed and how the Internet has reached to a point where a new transport protocol adoption is impractical, I wonder how long we will all have to live with TCP before Internet traffic reaches a point where a whole new layering system must be re-architected (and what might David Clark might have to say about that).” 20

21. Packet Mis-sequencing 1. Does the Internet allow packets to be mis-sequenced? 2. Why do we (or network operators) care? 3. Will the Internet require packets to stay in sequence in the future? 21

22. 22 Out R R R R/N In R R R R/N Packet Reordering 1 2

23. 23 Out R R R R/N In R R R R/N Bounding Delay Difference Between Middle Ports 1 2

24. 24 Out R R R R/N In R R R R/N 1 2 3 Uniform Frame Spreading 1 2

25. 25 Out R R R R/N In R R R R/N FOFF (Full Ordered Frames First) 1 2

26. 26 FOFF (Full Ordered Frames First) Input Algorithm  N FIFO queues corresponding to the N output flows  Spread each flow uniformly: if last packet was sent to middle port k, send next to k+1.  Every N time-slots, pick a flow: - If full frame exists, pick it and spread like UFS - Else if all frames are partial, pick one in round-robin order and send it 12 3 1 2 4 N

27. 27 Out R R R R/N In R R R R/N Bounding Reordering 1 2 3

28. 28 FOFF Output properties  N FIFO queues corresponding to the N middle ports  Buffer size less than N 2 packets  If there are N 2 packets, one of the head-of-line packets is in order 11 1 2 2 3 3 3 Output 4 N

29. 29 VLB + FOFF Properties With quite a lot of work, packet order is maintained Interestingly, expected packet delay is within a constant of OQ switch (surprising) Therefore, VLB with FOFF has 100% throughput

30. 30 Outline 1. Basic idea of load-balancing 2. Packet mis-sequencing 3. An optical switch fabric

31. What you said "They state that their theoretical 100 Tb/s switch should be able to be built in about 3 years, so if they were correct it should have long since have been built. I was unable to find anything about 100 Tb/s optics switches being used, so I’m not sure if it happened or not. There was another paper on the subject in 2010, suggesting that it took more than 3 years for technology to advance sufficiently. If such a switch has been manufactured, did it perform to expectations? If not, what prevented it?” 31

32. 32 Out R R R R/N In R R R R/N From Two Meshes to One Mesh One linecard In Out

33. 33 From Two Meshes to One Mesh First mesh In Out In Out In Out In Out One linecard Second mesh R R R R R

34. 34 From Two Meshes to One Mesh Combined mesh In Out In Out In Out In Out 2R R

35. 35 Many Fabric Options Options Space: Full uniform mesh Time: Round-robin crossbar Wavelength: Static WDM Any spreading device C 1, C 2, …, C N C1C1 C2C2 C3C3 CNCN In Out In Out In Out In Out N channels each at rate 2R/N One linecard

36. 36 AWGR (Arrayed Waveguide Grating Router) A Passive Optical Component  Wavelength i on input port j goes to output port (i+j-1) mod N  Can shuffle information from different inputs  1,  2 …  N NxN AWGR Linecard 1 Linecard 2 Linecard N  1  2  N Linecard 1 Linecard 2 Linecard N

37. 37 In Out In Out In Out In Out Static WDM Switching: Packaging AWGR Passive and Almost Zero Power A B C D A, B, C, D A, A, A, A B, B, B, B C, C, C, C D, D, D, D N WDM channels, each at rate 2R/N

38. Linecard placement and failure What happens if a linecard is missing or fails? Does this happen in practice? 38