1. 241-208 CH111 Chapter 11 CMOS and TTL Circuits By Taweesak Reungpeerakul

2. 241-208 CH112 Contents Basic Operational Characteristics and Parameters CMOS Circuits TTL Circuits

3. 241-208 CH113 11.1 Basic Operational Characteristics and Parameters DC Supply Voltage  CMOS: +5 or +3.3 Volts  TTL : +5 Volts CMOS Logic Levels  +5 V Supply V IH : 3.5-5 VV OH : 4.4-5 V V IL : 0-1.5 VV OL : 0-0.33 V  +3.3 V Supply V IH : 2-3.3 VV OH : 2.4-3.3 V V IL : 0-0.8 VV OL : 0-0.4 V TTL Logic Levels (+5 V Supply ) V IH : 2-5 VV OH : 2.4-5 V V IL : 0-0.8 VV OL : 0-0.4 V

4. 241-208 CH114 11.1 Basic Operational Characteristics and Parameters (cont.) Noise Immunity Noise Margin Power Dissipation Propagation Delay (t PHL & t PLH ) Speed-Power Product Loading and Fan-out

5. 241-208 CH115 Noise Immunity

6. 241-208 CH116 Noise Margin V NH = V OH(min) – V IH(min) V NL = V IL(max) – V OL(max) Find V NH & V NL for 5 V CMOS  V NH = V OH(min) – V IH(min) = 4.4 – 3.5 = 0.9 V  V NL = V IL(max) – V OL(max) = 1.5 – 0.33 = 1.17 V Question: Find V NH & V NL for 5 V TTL

7. 241-208 CH117 Power Dissipation I CC = I CCH +I CCL 2 P D = V CC *I CC Example: find P D  2 µA when HI  3.6 µA when LO  50% Duty cycle Power VS Frequency I CC = 2.8 µA P D = (5V)(2.8µA) = 14 µW

8. 241-208 CH118 Loading and Fan-out Fan-out

9. 241-208 CH119 CMOS Loading

10. 241-208 CH1110 TTL Loading

11. 241-208 CH1111 11.2 CMOS Circuits MOSFET n-channel p-channel

12. 241-208 CH1112 CMOS Inverter

13. 241-208 CH1113 CMOS NAND Gate

14. 241-208 CH1114 CMOS NOR Gate

15. 241-208 CH1115 Open-drain Gate

16. 241-208 CH1116 Tristate CMOS Gate

17. 241-208 CH1117 11.3 TTL Circuits The Bipolar Junction Transistor (BJT) TTL Inverter TTL NAND Gate Open-collector Gates Tristate TTL Gates

18. 241-208 CH1118 The Bipolar Junction Transistor (BJT)

19. 241-208 CH1119 TTL Inverter

20. 241-208 CH1120 TTL NAND Gate

21. 241-208 CH1121 Open-collector Gates

22. 241-208 CH1122 Tristate TTL Gate