1. AVR Microcontrollers

2. Topics Introduction to AVRs AVR Architecture & Instruction Set
Focus on Atmega128 AVR
AVR Programming

3. Why Microcontroller?
Purpose ?

4. Microcontroller
Microcontrollers are important part of Embedded systems
To understand Structure & working of Microcontrollers
For Designing good Embedded system complete understanding of microcontrollers required

5. Microcontroller
Integrated chip that typically contains integrated CPU, memory (RAM ROM), I/O ports on a single Chip.
System on a single Chip
Designed to execute a specific task to control a single
system
Smaller & Specified (design cost)
Differs from Microprocessor
general-purpose chip
Used to design multi purpose computers or devices
Require Multiple chips to to handle various tasks

6. AVR Microcontroller AVR stand for? Advanced Virtual RISC,
the founders are Alf Egil Bogen Vegard Wollan RISC
AVR architecture was conceived by two students at Norwegian Institute of Technology (NTH)[1] and further refined and developed at Atmel Norway, the Atmel company founded by the two chip architects.

7. AVR Microcontroller AVR Micro controllers is Family of
RISC Microcontrollers from Atmel.
There are multiple architectures
RISC (Reduced Instruction Set Computer)
CISC (Complex Instruction Set Computer)

8. RISC Microcontroller Reduced Introduction Set Computer
Till 1980 Trend was to build increasingly complex CPUs with complex set of instructions like (CISC)
(RISC)
Instruction execute in single cycle
“Architecture which reduces the chip complexity by simpler processing instructions”.
RISC architecture CPUs capable of executing only a very limited (simple) set of instructions.

9. RISC Microcontroller CISC Approach
Complete the task in few assembly line code
TASK multiply 2:3, 5:2 locations numbers
and put output in 5:2 location
Command: MULT 2:3, 5:2
MULT is what is known as a "complex instruction."
Instruction does`t complete in one cycle execution.
Processor hardware that is capable of understanding and executing a series of operations.

10. RISC Microcontroller RISC Approach
RISC processors only use simple instructions
that can be executed within one clock cycle.
"MULT" command divided into three separate commands:
LOAD A, 2:3 LOAD B, 5:2 PROD A, B STORE 2:3, A
Single Cycle Execution

11. RISC Microcontroller Reduced Instruction Set Computers Advantages
Fast Execution of Instructions due to simple instructions for CPU.
RISC chips require fewer transistors, which makes them cheaper to design and produce.
Emphasis on software
Single-clock,reduced instruction only
Register to register: “LOAD" and "STORE“
are independent instructions
Spends more transistors on memory registers

12. AVR Microcontroller Harvard Architecture von Neumann architecture
The AVR is a Harvard architecture CPU.
Harvard Architecture
Computer architectures that used physically separate storage and signal pathways for their instructions and data.
CPU can read both an instruction and data from memory at the same time that makes it faster.
von Neumann architecture
CPU can Read an instruction or data from/to the memory.
Read, Write can`t occur at the same time due to same memory and signal pathway for data and instructions.

13. AVR Microcontroller
Harvard Architecture
Harvard Architecture diagram

14. AVR Microcontroller
A series of 8-bit RISC microcontrollers from Atmel.
All AVR microcontrollers share same instruction set and a basic CPU (Harvard) architecture.
It has 32 8-Bit general purpose registers.
Mostly instruction Execute in Single clock cycle. Which makes it faster among 8 bit microcontrollers.
AVR was designed for efficient execution of compiled C code.

15. AVR Microcontroller
AVR is a family of 8-bit microntrollers with a large range of variants differing in:
- size of program-memory (flash) - size of EEPROM memory - number of I/O pins - number of on-chip features such as uart and adc
Smallest microconroller is the ATTiny11 with 1k flash ROM, no RAM and 6 I/O pins.
Large such as the ATMEGA128 with 128k flash, 4KB RAM,
53 I/O pins and lots of on-chip features.

16. AVR Microcontroller

17. AVR AT90S2313 Microcontrollers
This is a microcontroller of AVR series from Atmel.
High-performance and Low-power RISC Architecture
It is a low voltage (2.7V - 6V),
high performance CMOS 8-bit micro controller based on the AVR RISC architecture that already discussed .
Since it is a microcontroller from AVR series ,it is also using
Harvard Architecture that already discussed

18. AVR AT90S2313 Architecture AT90S2313 provides the following features:
2K bytes of In-System Programmable Flash
28 bytes EEPROM
128 bytes SRAM
15 general purpose I/O lines
32 general purpose working registers
flexible Timer/Counters with compare modes
internal and external interrupts
A programmable serial UART
~ one 8 bit timer/counter
~ one16-bit timer/counter
~ Analog Comparator
~ on chip oscillator and clock circuitry

19. AVR Architecture Registers Instruction Set I/O ports
Memory (flash & RAM & ROM)
CPU

20. AVR Architecture Registers: Two types of registers
GERNEL purpose & SPECIAL purpose registers
GERNEL purpose
32 general purpose registers having storage capacity of 8-Bits
Named as R0,R1,R2 to R31.
Register 0 to 15 & 16 to 31 are different.
Can store both Data & Addresses.
SPECIAL purpose: Three registers      
Program counter
      Stack Pointer
Status Register

21. Read/Write from address X, don't change the pointer
AVR Architecture
Pointer Register
Three 16-bit address registers pairs of registers 26 to 31
have extra meaning in AVR assembly.
X (r27:r26), y (r29:r28), z (r31:r30).
pointer
Sequence X
Read/Write from address X,
don't change the pointer

22. AVR Architecture status register (SREG) that contains
It is 8-bit long each bit has a different meaning.
I: Global Interrupt Enable/Disable Flag, SREG7
T: Transfer bit used by BLD and BST instructions, SREG6
H: Half Carry Flag, SREG5
S: For signed tests Instruction Set, SREG4
V: Two's complement overflow indicator, SREG3
N: Negative Flag, SREG2
Z: Zero Flag, SREG1
C: Carry Flag, SREG0 I Z T N H S V C

23. AVR Architecture Stack Pointer (SP)
16-bit stack pointer (SP) holds address in data space of area to save function call information.

24. Register Architecture
AVR
Register Architecture

25. AVR Architecture Memory: There are two separate memories
Program Memory (Flask Memory)
Data Memory

26. AVR AT90S2313 Memory Architecture Memory:
Program Memory (Flask Memory)
2K Bytes of flash memory
128 Bytes of In-System Programmable EEPROM
program memory holds interrupt function addresses,
16 bit and double word (32 bit) opcode, and static data tables

27. AVR AT90S2313 Memory Architecture Data Memory
Used for data and is separate from the program memory.
128 Bytes of SRAM
Register reassigned the 32 Data Space addresses ($00 - $1F),
I/O memory space contains 64 addresses for CPU peripheral functions such as
control registers,
Timer/Counters,
A/D converters and other I/O functions. I/O memory can be accessed directly or as the Data Space locations those of the Register File, $20 - $5F.
Stack is effectively allocated in the general data SRAM, and consequently the stack size is only limited by the total SRAM size and the usage of the SRAM.

28. AVR AT90S2313 instruction Architecture AVR Instruction SET
118 Powerful Instructions – Most Single Clock Cycle Execution
All arithmetic operations are done on registers R0 - R31
Mostly instructions take one cycle for execution
ADD Rd,Rr
Rd: Destination (and source) register in the Register File
Rr: Source register in the Register File

29. AVR AT90S2313 instruction Architecture Instruction add R23, R11
Be encoded as the 16-bit opcode 0x0EEB.
Bit pattern :
Three components.
5 red bits distinguish this as an add instruction.
5 blue bits indicates register 23 is the first operand register.
The 5 green bits indicates register 11 is the second operand register.
All add Rd, Rr instructions follow this pattern.

30. AVR AT90S2313 I/O Pins General Purpose I/O Ports
Ports are simply the gates through which the CPU interacts with the outside world
Each port has 3 control registers associated with it,
DDRx, PORTx, and PINx
The DDR (Data Direction Register) bit tells a leg to act as an input (0), or output (1).
The PORT (Pin Output / Read Tweak)
The PIN (Port INput) register is read only,
I/O and Packages
– 15 Programmable I/O Lines

31. AVR AT90S2313 I/O Pins Port B is an 8-bit bi-directional I/O port.
Three I/O memory address locations are allocated for the Port B,
Data Register (Read/Write) PORTB, ($38),
Data Direction Register (Read/Write) DDRB, ($37)
PortB Input Pins (read-only, )– PINB, ($36).
All port pins have individually selectable pull-up resistors.

32. AVR AT90S2313 I/O Pins Port B Input Pins Address –PINB
Port B Data Register – PORTB
Port B Data Direction Register– DDRB
Port B Input Pins Address –PINB

33. AVR AT90S2313 I/O Pins
Three I/O memory address locations are allocated for the Port D: Data Register (read/write)– PORTD, $12($32),
Data Direction Register (read/write)– DDRD, $11($31)
Port D Input Pins(read-only) – PIND, $10($30).

34. AVR AT90S2313 I/O Pins Port B Input Pins Address –PINB
Port B Data Register – PORTB
Port B Data Direction Register– DDRB
Port B Input Pins Address –PINB

35. AVR AT90S2313 CPU CPU – Up to 10 MIPS Throughput at 10 MHz
The AVR is a Harvard architecture CPU, The AVR is a Harvard architecture CPU,
Program Memory Is separated from data Memory
Program memory is accessed with a single level pipelining (Fetch & execute).

36. AVR AT90S2313 Extra factures
Peripheral Features
– One 8-bit Timer/Counter with Separate Prescaler
– One 16-bit Timer/Counter with Separate Prescaler,
Compare, Capture Modes and 8-, 9-, or 10-bit PWM
– On-chip Analog Comparator
– Programmable Watchdog Timer with On-chip Oscillator
– SPI Serial Interface for In-System Programming
– FullDuplexUART

37. AVR AT90S2313 Extra factures • Special Microcontroller Features
– Low-power Idle and Power-down Modes
– External and Internal Interrupt Sources
• Specifications
– Low-power, High-speed CMOS Process Technology

38. AVR Studio
Integrated Development Environment (IDE) for writing and debugging AVR applications for windows environments.  
AVR Studio provides a project management tool, source file editor, chip simulator and In-circuit emulator interface for the powerful AVR 8-bit RISC family of microcontrollers.
Download site: AVR Studio 4