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3/7/05A. Semenov Batch-by-Batch Intensity Monitor 1 Two-Channel Batch by Batch Intensity Monitor for Main Injector BBI.

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Presentation on theme: "3/7/05A. Semenov Batch-by-Batch Intensity Monitor 1 Two-Channel Batch by Batch Intensity Monitor for Main Injector BBI."— Presentation transcript:

1 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 1 Two-Channel Batch by Batch Intensity Monitor for Main Injector BBI

2 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 2 Two-Channel BBI Device BNC Input # 1 From Wall Current BNC Input # 2 From Wall Current Beam/No Beam Output signal #1 Analog output #1 Analog output #2 Beam/No Beam Output signal #2 TCLK MDAT EXT RF CLOCK EXT SYNC #AA Marker

3 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 3 BBI device location – MI60 BBI WCM fanout MI60004

4 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 4 NuMI batches pbar batch What are the main Goals? One batch to pbar, the rest to NuMI Data at 720Hz of beam intensity for 7 different gates (Fast Time Plot) “beam/no beam” logic signal if beam is present after extraction Analog signal of beam intensity for selected gate

5 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 5 Main Injector Harmonics 0 82 122 208 294 380 466 588 0 Placement of gates 1 Pbar batch Bucket 0 (Synched with RF) 2 1500 ns before NuMI Batch 1 3 NuMI batch 1 Bucket 122 4 2 208 5 3 294 6 4 380 7 5 466 8 Possible 6th NuMI batch Gate1 Pbar batch Gate2 Pbar Kicker firing Gate3 NUMI batch1 Gate4 NUMI batch2 Gate5 NUMI batch3 Gate6 NUMI batch4 Gate7 NUMI batch5 Gate8 ?NUMI batch6 Kicker

6 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 6 Project Critical Point #1 Short ~5ns pulses from WCM Figure 1 Bunch structure and a 5 bucket gap between batches, measured with the WCM 94ns

7 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 7 Project Critical Point #2 Varying baseline Figure 2 Varying baseline of the RWM during multi batch mode. Figure 3 Expanded measurement of the multi batch structure during 3 turns with the RWM. The varying baseline is evident. Over full cycle (1.3 secs)Turn by turn

8 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 8 Project Critical Point #3 Gates Timing Figure 4 RWСM measurement of the multi batch structure with the pbar batch being isolated by larger gaps (~43 buckets) Integration gates 500-1600ns Minimum time between NuMI batch windows 3 buckets ~55ns Time between pbar and NuMI batches: 43 buckets ~800ns Two main integration gates: Batch(83 x 18.8ns) 1560ns NuMI Kicker rise time 1300 - 1500ns Maximum rise/fall time of gate 10ns

9 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 9 BBI Hardware FPGA CYCLONE 53 MHz, TCLK, RevMarker.. VGA 212MHz ADC Cable from Tunnel 400MHz DAC 12 Ethernet INPUTs: resistive wall current monitor OUTPUT: Pulse stretcher DSP SHARC 10Mbit ETHERNET RS232, RS485 Channels: 1,2

10 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 10 Direct Sampling at 200MHz This signal is too fast for a measurement by 200MHz Digitizer ~4ns (I max -I min )/ I ~42% 1000 400 Samples at 200MHz phase between beam signal and digitizer clock

11 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 11 Analog Pulse Stretcher OPA PA + - Td = 5ns cable Input Output Spreads signal +/-5ns in time so it will not be missed by ADC At 200MHz Reduces ADC Dynamic Range requirement ~4ns 5ns PreAmp Operational Amplifier

12 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 12 Analog Pulse Stretcher Input Pulse Width = 2ns Tdelay = Tsample No phase errors

13 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 13 Analog Pulse Stretcher Tdelay > Tsample (20%) (I max -I min )/ I ~1.6% In Pulse 5ns Output phase errors!!!

14 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 14 FPGA Baseline Correction How define baseline? it is natural for our case to define "baseline" as a line “not containing peaks" It means that for base line correction algorithm we should use at list 2 parameters – threshold (to detect a peak amplitude above baseline) and window ( to separate a slow fluctuation of base line signal and peak signal in time domain region)

15 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 15 Two Step Baseline Correction Algorithm Step 1 : fix the “floor” of signal by averaging the lowest signal point from a sliding set (64) of programmable windows (100 buckets) and use to define the “minimum signal base line” used to define input signal threshold Step 2 : calculate natural baseline by averaging all signals points below the threshold Step 1: 100 bucket window Step1: Minimum points Step1: minimum signal base line Step2:Threshold Step2: final baseline

16 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 16 Two Step Baseline Correction Algorithm $23 step1: input signal – minimum signal baseline Threshold

17 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 17 Two Step Baseline Correction Algorithm $23 Step2: output signal

18 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 18 Two Step Baseline Correction Algorithm Hardware Implementation Comparator Temporary Min Value Register Sliding Average Filter Write new value at the end of window Window INPUT: Data from RF 1 bucket Integrator ~18.8ns Rank 64 - + Minimum signal points Current minimum signal point inside time window minimum signal baseline Step1: averaging a minimum signal points inside programmable window OUTPUT: Input Data with restored MinBaseLine Input Pulses

19 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 19 Two Step Baseline Correction Algorithm Hardware Implementation (continued) Window Comparator Baseline Register Moving Average Filter Final Baseline Threshold - + OUTPUT: Input Data with Restored Base line Rank 64 INPUT: Input Data with restored MinBaseLine Input Pulses Threshold Baseline Step2: averaging all signals points below programmable threshold

20 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 20 FPGA Design BLC Gate Integrator #0 StartStopMean# SHARC SPORT 32bit, 10Mbit Gate Integrator #6 StartStopMean# Threshold >= Beam/No Beam TCLK RF,53MHz TCLK From ADC Rev Marker PLL Multiplier ADC CLOCK Timestamp counter Intensity (gate #0) DAC Intensity #0 FIFO Delay RF INT To SHARC DSP

21 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 21 FPGA FUNCTIONS What we do in the “CYCLONE”: 1)Base Line Corrections 2)Beam Intensity calculation - Multi-Turn Averaging 3)Generate the correct position of the batch gates. It is possible to program the position of the gates and the beam threshold for NuMI gate through ACNET 4)A FPGA PLL multiplier (x4) is used to synchronize the digitizer with the external RF or internal (53MHz) clock

22 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 22 FPGA FUTURES What we do in the “CYCLONE” (continued): 5)Ability to trigger on TCLK events 6)Multi-Turn “Scope Trace” buffer to analyze input and post-processing signals (4K samples) 7)10 Mbit,32bit serial interface to SHARC DSP

23 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 23 SHARC Digital Signal Processor SHARC 21065L Ethernet RTL8019AS 2MB FLASH RAM AM29LV017D 2MB SDRAM 48LC1M16A1 FPGA IO Controller MAX7128 Front End Control: VGA, ADC, DAC FPGA SPORT interface RS232, RS485 ACNET, ETHERNET

24 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 24 SHARC’s role on BBI board Interface board to ACNET (OAC) via TCP/IP –Includes remote firmware/software update Read/write BBI CYCLONE “control” registers, so that BBI processing can be controlled and monitored via network additional “offline” data processing and filtering ( fast time plots, base line corrections, FE dynamic range control by VGA,…)

25 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 25 Summary Signal Processing Steps: 1) Analog pulse stretcher 2) Digitizing by 12 bit ADC at 53x4=212MHz 3) FPGA base line correction 4)FPGA gate intensity calculation 5)FPGA Multiturn Averaging 6)FPGA Beam/NoBeam checking 7)“Scope Trace Buffers” for all gates 8)SHARC signal processing, FTP calculation 9)SHARC TCP/IP data transfer to OAC Inside FPGA

26 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 26 SUM of Gates Intensity Fast Time Plot FPGA Constructed Total Intensity Full NuMI Cycle Gates Intensity

27 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 27 Gates Intensity Fast Time Plot $23 1.9 e13 NuMI Cycle 0 1 2 3 4 5 6 Gates (Batches)

28 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 28 Batch by Batch Intensity $23 stacking batch Numi veto buckets (no beam just before NuMI extraction NuMI Batches slip stack batch

29 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 29 $21 Cycle stacking batch Numi veto buckets (no beam just before NuMI extraction slip stack batch

30 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 30 BBI LabView Interface

31 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 31 BBI ACNET General page

32 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 32 BBI ACNET page for channel #1

33 3/7/05A. Semenov Batch-by-Batch Intensity Monitor 33 BBI ACNET page for channel #2


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