Presentation is loading. Please wait.

Presentation is loading. Please wait.

Operating System Concepts Ku-Yaw Chang Assistant Professor, Department of Computer Science and Information Engineering Da-Yeh University.

Similar presentations


Presentation on theme: "Operating System Concepts Ku-Yaw Chang Assistant Professor, Department of Computer Science and Information Engineering Da-Yeh University."— Presentation transcript:

1 Operating System Concepts Ku-Yaw Chang canseco@mail.dyu.edu.tw Assistant Professor, Department of Computer Science and Information Engineering Da-Yeh University

2 2Ku-Yaw ChangChapter 2 Computer-System Structures Chapter 2 Computer System Structures General knowledge of the structure of a computer system System startup System startup I/O I/O Storage Storage Hardware protection Hardware protection Network structure Network structure

3 3Ku-Yaw ChangChapter 2 Computer-System Structures Chapter 2 Computer System Structures 1.Computer-System Operation 2.I/O Structure 3.Storage Structure 4.Storage Hierarchy 5.Hardware Protection 6.Network Structure 7.Summary 8.Exercises

4 4Ku-Yaw ChangChapter 2 Computer-System Structures 2.1 Computer-System Operation General-purpose computer system Consist of Consist of A CPU A number of device controllers Access to shared memory Access to shared memory A common bus Execute simultaneously Execute simultaneously Competing for memory cycles

5 5Ku-Yaw ChangChapter 2 Computer-System Structures A modern computer system

6 6Ku-Yaw ChangChapter 2 Computer-System Structures Bootstrap program An initial program to run Tend to be simple Tend to be simple Stored in ROM (Firmware or EEPROM) Stored in ROM (Firmware or EEPROM) Startup procedure Locate and load the OS kernel into memory Locate and load the OS kernel into memory Start executing the OS kernel Start executing the OS kernel Executing first process, such as “init” Waiting for some event to occur

7 7Ku-Yaw ChangChapter 2 Computer-System Structures Interrupt Driven An event is signaled by an interrupt from Hardware Hardware Send a signal to CPU Software – a special operation Software – a special operation a system call ( a monitor call) A trap (or an exception) is a software- generated interrupt caused by An error ( ex. division by zero) An error ( ex. division by zero) A specific request from a user program A specific request from a user program

8 8Ku-Yaw ChangChapter 2 Computer-System Structures Interrupt Driven For each type of interrupt, an interrupt service routine is provided to deal with the interrupt. When the CPU is interrupted, it stops what it is doing and immediately transfers execution to a fixed location. When the CPU is interrupted, it stops what it is doing and immediately transfers execution to a fixed location. The fixed location contains the starting address where the service routine for the interrupt is located. The fixed location contains the starting address where the service routine for the interrupt is located. The interrupt service routine executes. The interrupt service routine executes. On completion, the CPU resumes the interrupted computation. On completion, the CPU resumes the interrupted computation.

9 9Ku-Yaw ChangChapter 2 Computer-System Structures Interrupt time line for a single process doing output

10 10Ku-Yaw ChangChapter 2 Computer-System Structures Interrupt Vector Interrupts must be handled quickly A predefined number of interrupts is possible A predefined number of interrupts is possible A table of pointers to interrupt routines A table of pointers to interrupt routines Interrupt vector Stored in low memory Indexed by a unique device number Save the address of the interrupted instruction Fixed location Fixed location A location indexed by the device number A location indexed by the device number System stack System stack

11 11Ku-Yaw ChangChapter 2 Computer-System Structures Chapter 2 Computer System Structures 1.Computer-System Operation 2.I/O Structure 3.Storage Structure 4.Storage Hierarchy 5.Hardware Protection 6.Network Structure 7.Summary 8.Exercises

12 12Ku-Yaw ChangChapter 2 Computer-System Structures 2.2.1 I/O Interrupts Start an I/O operation The CPU loads the registers within the device controller. The CPU loads the registers within the device controller. The device controller examines the registers to determine what actions to take. The device controller examines the registers to determine what actions to take. I/O in progress I/O in progress The device controller informs the CPU The device controller informs the CPU Triggering an interrupt

13 13Ku-Yaw ChangChapter 2 Computer-System Structures Synchronous I/O After I/O starts, control returns to user program only upon I/O completion. Wait instruction idles the CPU until the next interrupt Wait instruction idles the CPU until the next interrupt Wait loop (contention for memory access). Wait loop (contention for memory access). At most one I/O request is outstanding at a time, no simultaneous I/O processing. At most one I/O request is outstanding at a time, no simultaneous I/O processing.

14 14Ku-Yaw ChangChapter 2 Computer-System Structures Asynchronous I/O After I/O starts, control returns to user program without waiting for I/O completion. System call – request to the operating system to allow user to wait for I/O completion. System call – request to the operating system to allow user to wait for I/O completion. Device-status table contains entry for each I/O device indicating its type, address, and state. Device-status table contains entry for each I/O device indicating its type, address, and state. Operating system indexes into I/O device table to determine device status and to modify table entry to include interrupt. Operating system indexes into I/O device table to determine device status and to modify table entry to include interrupt.

15 15Ku-Yaw ChangChapter 2 Computer-System Structures Two I/O methods (a) Synchronous(b) Asynchronous

16 16Ku-Yaw ChangChapter 2 Computer-System Structures Device-status table

17 17Ku-Yaw ChangChapter 2 Computer-System Structures 2.2.2 DMA Structure Used for high-speed I/O devices able to transmit information at close to memory speeds. Device controller transfers blocks of data from buffer storage directly to main memory without CPU intervention. Only one interrupt is generated per block, rather than the one interrupt per byte. Cycle stealing DMA controller “steals” memory cycles from the CPU. DMA controller “steals” memory cycles from the CPU.

18 18Ku-Yaw ChangChapter 2 Computer-System Structures Chapter 2 Computer System Structures 1.Computer-System Operation 2.I/O Structure 3.Storage Structure 4.Storage Hierarchy 5.Hardware Protection 6.Network Structure 7.Summary 8.Exercises

19 19Ku-Yaw ChangChapter 2 Computer-System Structures 2.3 Storage Structure Main memory Also called random-access memory or RAM Also called random-access memory or RAM Computer programs must reside in The only large area the CPU can access directly An array of memory words An array of memory words load and store Specific memory addresses Specific memory addresses Von Neumann architecture Instruction register Instruction register Other internal registers Other internal registers

20 20Ku-Yaw ChangChapter 2 Computer-System Structures 2.3 Storage Structure Ideally, programs and data reside in main memory permanently. Not possible, because Not possible, because Main memory is too small Main memory is a volatile storage Second storage An extension of main memory An extension of main memory The most common device is a magnetic disk The most common device is a magnetic disk

21 21Ku-Yaw ChangChapter 2 Computer-System Structures 2.3.1 Main Memory CPU can access directly Main memory Main memory Registers built in the processor Registers built in the processorCache Fast memory between the CPU and main memory Fast memory between the CPU and main memory Memory-mapped I/O Ranges of memory addresses are mapped to the device registers. Ranges of memory addresses are mapped to the device registers. Devices have fast response times, such as video controllers.

22 22Ku-Yaw ChangChapter 2 Computer-System Structures 2.3.2 Magnetic Disks The bulk of secondary storage for modern computer system. Disk platter Disk platter A flat circular shape like a CD Covered with a magnetic material Consists of Tracks Tracks Sectors Sectors Cylinders Cylinders Disk arm Disk arm

23 23Ku-Yaw ChangChapter 2 Computer-System Structures Moving-head disk mechanism

24 24Ku-Yaw ChangChapter 2 Computer-System Structures 2.3.3 Magnetic Tapes Early secondary-storage medium Features Relatively permanent Relatively permanent Hold large quantities of data Hold large quantities of data Access time is slow Access time is slowPurposes Backup Backup Storage of infrequently used information Storage of infrequently used information Transferring system information Transferring system information

25 25Ku-Yaw ChangChapter 2 Computer-System Structures Chapter 2 Computer System Structures 1.Computer-System Operation 2.I/O Structure 3.Storage Structure 4.Storage Hierarchy 5.Hardware Protection 6.Network Structure 7.Summary 8.Exercises

26 26Ku-Yaw ChangChapter 2 Computer-System Structures 2.4 Storage Hierarchy Wide variety of storage systems can be organized in a hierarchy according to Speed Speed Cost Cost Volatility Volatility Volatile storage Lose contents when the power is removed Lose contents when the power is removed Ex. register, cache, main memory Ex. register, cache, main memory Non-volatile storage Keep contents all the time Keep contents all the time Ex. magnetic disk, optical disk, magnetic tapes Ex. magnetic disk, optical disk, magnetic tapes

27 27Ku-Yaw ChangChapter 2 Computer-System Structures Storage-device hierarchy

28 28Ku-Yaw ChangChapter 2 Computer-System Structures 2.4.1 Caching Use of high-speed memory to hold recently-accessed data. Requires a cache management policy. Caching introduces another level in storage hierarchy. This requires data that is simultaneously stored in more than one level to be consistent. This requires data that is simultaneously stored in more than one level to be consistent.

29 29Ku-Yaw ChangChapter 2 Computer-System Structures Migration of integer A from disk to register The same data may appear in different levels of the storage system. 2.4.2 Coherency and Consistency

30 30Ku-Yaw ChangChapter 2 Computer-System Structures Only one process at a time The highest level of the hierarchy The highest level of the hierarchyMultitasking Extreme care must be taken Extreme care must be takenMultiprocessor Cache coherency (hardware problem) Cache coherency (hardware problem) A copy of A may exist in several caches Distributed environment Consistency Consistency Several copies (replicas) on different computers 2.4.2 Coherency and Consistency

31 31Ku-Yaw ChangChapter 2 Computer-System Structures Chapter 2 Computer System Structures 1.Computer-System Operation 2.I/O Structure 3.Storage Structure 4.Storage Hierarchy 5.Hardware Protection 6.Network Structure 7.Summary 8.Exercises

32 32Ku-Yaw ChangChapter 2 Computer-System Structures 2.5 Hardware Protection Early computer systems Single-user programmer-operated systems Single-user programmer-operated systems Operating systems were called resident monitors Operating systems were called resident monitors Sharing system resources Improve utilization Improve utilization Increase problems Increase problems Many processes could be affected by a bug in one program. All output must be suspect Many programming errors Detected by the hardware Detected by the hardware Handled by the operating system Handled by the operating system

33 33Ku-Yaw ChangChapter 2 Computer-System Structures 2.5 Hardware Protection Dual-Mode Operation I/O Protection Memory Protection CPU Protection

34 34Ku-Yaw ChangChapter 2 Computer-System Structures 2.5.1 Dual-Mode Operation Sharing system resources OS ensures that an incorrect program cannot cause other programs to execute incorrectly. OS ensures that an incorrect program cannot cause other programs to execute incorrectly. Provide hardware support to differentiate between at least two modes of operations. 1.User mode – execution done on behalf of the user. 2.Monitor mode (also kernel mode, system mode, or privileged mode) – execution done on behalf of the operating system.

35 35Ku-Yaw ChangChapter 2 Computer-System Structures 2.5.1 Dual-Mode Operation Mode bit - A bit added to the hardware to indicate the current mode: Monitor (0) Monitor (0) User (1) User (1) Whenever a trap or interrupt occurs, the hardware switches from user mode to monitor mode. At boot time, the hardware starts in monitor mode. At boot time, the hardware starts in monitor mode. OS runs in monitor mode. OS runs in monitor mode. User programs run in user mode. User programs run in user mode.

36 36Ku-Yaw ChangChapter 2 Computer-System Structures 2.5.1 Dual-Mode Operation Privileged instructions May cause harm May cause harm Executed only in the monitor mode Executed only in the monitor mode By the OS Known as a system call ( also a monitor call or an OS function call) Known as a system call ( also a monitor call or an OS function call) monitoruser Trap/Interrupt set user mode

37 37Ku-Yaw ChangChapter 2 Computer-System Structures 2.5.2 I/O Protection All I/O instructions are defined to be privileged instructions. The user program executes a system call to request an I/O. The user program executes a system call to request an I/O. OS can check if the I/O request is valid or not OS can check if the I/O request is valid or not If valid, OS does the I/O request, and returns to the user. If valid, OS does the I/O request, and returns to the user. Must ensure that a user program could never gain control of the computer in monitor mode (i.e., a user program that, as part of its execution, stores a new address in the interrupt vector).

38 38Ku-Yaw ChangChapter 2 Computer-System Structures Use of a system call to perform I/O

39 39Ku-Yaw ChangChapter 2 Computer-System Structures 2.5.3 Memory Protection Must provide memory protection at least for Interrupt vector Interrupt vector Interrupt-service routines Interrupt-service routines Such protection must be provided by the hardware. One possible implementation One possible implementation Base register The smallest legal physical memory address The smallest legal physical memory address Limit register The size of the range The size of the range

40 40Ku-Yaw ChangChapter 2 Computer-System Structures Use of a base and limit register

41 41Ku-Yaw ChangChapter 2 Computer-System Structures Hardware address protection with base and limit registers

42 42Ku-Yaw ChangChapter 2 Computer-System Structures 2.5.4 CPU Protection A timer interrupts computer after specified period to ensure operating system maintains control. interrupts computer after specified period to ensure operating system maintains control. The OS sets the counter. The OS sets the counter. Be decremented every clock tick. When the counter reaches the value 0, an interrupt occurs. When the counter reaches the value 0, an interrupt occurs. Timer instructions are privileged.

43 43Ku-Yaw ChangChapter 2 Computer-System Structures 2.5.4 CPU Protection Functionality Prevent a user program from running too long Prevent a user program from running too long Implement time sharing. Implement time sharing. The time slice Compute the current time. Compute the current time.

44 44Ku-Yaw ChangChapter 2 Computer-System Structures Chapter 2 Computer System Structures 1.Computer-System Operation 2.I/O Structure 3.Storage Structure 4.Storage Hierarchy 5.Hardware Protection 6.Network Structure 7.Summary 8.Exercises

45 45Ku-Yaw ChangChapter 2 Computer-System Structures 2.6 Network Structure Two basic types of networks LAN: local-area network LAN: local-area network Small geographical areas Higher speed and lower error rate 10BaseT Ethernet: 10 megabits per second 10BaseT Ethernet: 10 megabits per second 100BaseT Ethernet: 100 megabits per second 100BaseT Ethernet: 100 megabits per second Gigabit Ethernet: 1 gigabits per second Gigabit Ethernet: 1 gigabits per second WAN: wide-area network WAN: wide-area network Large geographical areas Slow and unreliable T1: 1.544 megabits per second T1: 1.544 megabits per second T3 (28 T1 connections) : 45 megabits per second T3 (28 T1 connections) : 45 megabits per second

46 46Ku-Yaw ChangChapter 2 Computer-System Structures Local-area network

47 47Ku-Yaw ChangChapter 2 Computer-System Structures Communication processors in a wide-area network

48 48Ku-Yaw ChangChapter 2 Computer-System Structures Chapter 2 Computer System Structures 1.Computer-System Operation 2.I/O Structure 3.Storage Structure 4.Storage Hierarchy 5.Hardware Protection 6.Network Structure 7.Summary 8.Exercises

49 49Ku-Yaw ChangChapter 2 Computer-System Structures Summary P.51 – P.52

50 50Ku-Yaw ChangChapter 2 Computer-System Structures Chapter 2 Computer System Structures 1.Computer-System Operation 2.I/O Structure 3.Storage Structure 4.Storage Hierarchy 5.Hardware Protection 6.Network Structure 7.Summary 8.Exercises

51 51Ku-Yaw ChangChapter 2 Computer-System Structures Exercises 2.32.42.52.62.9

52 The End


Download ppt "Operating System Concepts Ku-Yaw Chang Assistant Professor, Department of Computer Science and Information Engineering Da-Yeh University."

Similar presentations


Ads by Google