1. reVieW Combinational & Sequential Logic Circuit EKT 221 / 4 DIGITAL ELECTRONICS II

2. Numbering System Binary Binary Decimal Decimal Octal Octal Hexadecimal Hexadecimal

3. Refresh… 1011 2 + 1100 2 = ___________ 1011 2 + 1100 2 = ___________ FFFF + 1 = ___________ FFFF + 1 = ___________

4. Conversion Binary to decimal Binary to decimal Octal to decimal Octal to decimal Hexa to decimal Hexa to decimal

5. Conversion Binary to decimal Binary to decimal Octal to decimal Octal to decimal  Convert 653 8 to its decimal equivalent Hexa to decimal Hexa to decimal  Convert 3B4F 16 to its decimal equivalent

6. Octal to Decimal Conversion Convert 653 8 to its decimal equivalent: 6 5 3 xx x 8 2 8 1 8 0 384 + 40 + 3 427 10 Positional Values Products Octal Digits

7. Hexadecimal to Decimal Conversion Convert 3B4F 16 to its decimal equivalent: Hex Digits 3 B 4 F xx x 16 3 16 2 16 1 16 0 12288 +2816 + 64 +15 15,183 10 Positional Values Products x

8. Conversion Decimal to binary Decimal to binary Decimal to octal Decimal to octal  Convert 427 10 to its octal equivalent Decimal to hexadecimal Decimal to hexadecimal  Convert 830 10 to its hexadecimal equivalent

9. Decimal to Octal Conversion Convert 427 10 to its octal equivalent: 427 / 8 = 53 R3Divide by 8; R is LSD 53 / 8 = 6 R5Divide Q by 8; R is next digit 6 / 8 = 0 R6Repeat until Q = 0 653 8

10. Decimal to Hexadecimal Conversion Convert 830 10 to its hexadecimal equivalent: 830 / 16 = 51 R14 51 / 16 = 3 R3 3 / 16 = 0 R3 33E 16 = E in Hex

11. Binary Arithmetic Addition Addition Subtraction Subtraction Multiplication Multiplication Division Division 1’s complement 1’s complement 2’s complement 2’s complement

12. Basic Logic Gates Page 31 in Mano & Kime. Page 31 in Mano & Kime.

13. Basic Logic Gates Page 32 in Mano & Kime. Page 32 in Mano & Kime.

14. Basic Identities of Boolean Algebra Page 35 in Mano & Kime. Page 35 in Mano & Kime.

15. Gates to implement Boolean function Page 38 in Mano & Kime. Page 38 in Mano & Kime.

16. Karnaugh Map Page 49, 53, 64 in Mano & Kime. Page 49, 53, 64 in Mano & Kime.

17. Combinational Arithmetic Circuits Addition: Addition: –Half Adder (HA). –Full Adder (FA). –Carry Ripple Adders. Subtraction: Subtraction: –Half Subtractor. –Full Subtractor. –Borrow Ripple Subtractors. –Subtraction using adders.

18. Half Adder X0011X0011 Y0101Y0101 S0110S0110 C-out 0 1 Half Adder Truth Table: Inputs Outputs S = X  Y C-out = XY XYXY Sum S C-out Half Adder X Y S C-OUT

19. Full Adder X00001111X00001111 Y00110011Y00110011 S01101001S01101001 C-out 0 1 0 1 C-in 0 1 0 1 0 1 0 1 Full Adder Truth Table S(X,Y, C-in) =  (1,2,4,7) C-out(x, y, C-in) =  (3,5,6,7) Inputs Outputs S = X  Y  (C-in) C-out = XY + X(C-in) + Y(C-in) Full Adder XY S C-in C-out

20. Full Adder X1Y1 S1 C-in C-out Full Adder X0Y0 S0 C-in C-out C0 =0 Full Adder X2Y2 S2 C-in C-out Full Adder X3Y3 S3 C-in C-out C1 C2C3 C4 Data inputs to be added Sum output 4-bit Carry Ripple Adder 4-bit Adder X3X2X1X0 S3 S2 S1 S0 C-in C-out C4 Y3Y2Y1Y0 C0 =0 Inputs to be added Sum Output

21. 4-bit Subtractor Using 4-bit Adder 4-bit Adder X3 X2 X1 X0 D3 D2 D1 D0 C-in C-out C4 Y3 Y2 Y1 Y0 C0 = 1 Inputs to be subtracted Difference Output S3 S2 S1 S0

22. Encoder Encoder converts information such as decimal number or an alphabetical character into some binary coded form Example: 8-to-3 Binary Encoder

23. Decoder Example: 3 to 8 Binary Decoder

24. Decoder Example: Seven Segment Decoder A seven segment decoder A seven segment decoder has 4-bit BCD input and has 4-bit BCD input and the seven segment display the seven segment display code as its output: code as its output: In minimizing the circuits In minimizing the circuits for the segment outputs all for the segment outputs all non-decimal input combinations non-decimal input combinations (1010, 1011, 1100,1101, 1110, (1010, 1011, 1100,1101, 1110, 1111) are taken as don’t-cares 1111) are taken as don’t-cares /Bl D C B A a b c d e f g 0 x x x x 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 1 1 1 0 1 0 0 0 1 0 1 1 0 0 0 0 1 0 0 1 0 1 1 0 1 1 0 1 1 0 0 1 1 1 1 1 1 0 0 1 1 0 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 1 0 1 1 1 1 1 1 0 0 0 0 1 1 0 0 0 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 0 0 1 1 1 1 0 1 0 0 0 0 1 1 0 1 1 1 0 1 1 0 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 0 1 1 1 1 1 0 1 1 0 0 1 0 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 -- don’t care inputs --

25. Multiplexer A 4 input multiplexer

26. Demultiplexer Example: 1- to -4 Demultiplexer

27. seQuenTial loGic

28. Latches: Latches: –S-R Latch –Gate S-R Latch –Gate D-Latch Flip-Flops: Flip-Flops: –Edge-Triggered Flip-Flop (S-R, J-K, D) –Asynchronous Inputs –Master-Slave Flip-Flop –Flip-Flop Operating Characteristics –Flip-Flop Applications –One-shots & The 555 Timer Latches & Flip Flop

29. Truth Table for each FF Truth Table for each FF +ve / -ve edge triggered +ve / -ve edge triggered Waveform Waveform

30. Basic shift register function Basic shift register function Serial in / serial out shift registers Serial in / serial out shift registers Serial in / parallel out shift registers Serial in / parallel out shift registers Parallel in / serial out shift registers Parallel in / serial out shift registers Parallel in / parallel out shift registers Parallel in / parallel out shift registers Bidirectional shift registers Bidirectional shift registers Shift register applications Shift register applications Shift Register

31. Serial In, Serial Out Shift Register (SISO)

32. Serial In, Parallel Out Shift register (SIPO) Data bits entered serially (right-most bit first) Difference from SISO is the way data bits are taken out of the register – in parallel. Output of each stage is available

33. Parallel In, Parallel Out Shift Register (PIPO) Immediately following simultaneous entry of all data bits,it appear on parallel output.

34. ASYNCHRONOUS COUNTER: A 2-bit asynchronous binary counter. Don’t have fixed time relationship with each other. Don’t occur at the same time. Don’t have a common clock pulse

35. SYNCHRONOUS COUNTER OPERATION A 2-bit synchronous binary counter.

36. UP/DOWN SYNCHRONOUS COUNTER A basic 3-bit up/down synchronous counter.