1. ENGSCI 232 Computer Systems Lecture 5: Synchronous Circuits

2. °The building block of synchronous circuits, such as counters and shift registers, is the flip-flop °A flip-flop is a device which can be ‘latched’ into either of two possible states and stay in that state until a specified set of input conditions occur.

3. °We can build a latch by using 2 NAND gates with appropriate coupling.

4. °Clocks °An asynchronous system allows states to change whenever one or more inputs change. This is generally harder to design and fault-find than a synchronous system. We will consider synchronous systems in this lecture. °Here the exact times at which outputs can change state is determined by the ‘clock’ signal. °The clock is normally a regular rectangular waveform and is applied to many component within a digital system. °A flip-flop may be designed to trigger on either the rising or falling edge of the clock pulse (ie when the clock is changing from 0 ->1 or 1->0).

5. °D-Type Flip-Flop

6. JK-type flip-flops °Similar to D flip-flop, but has two data inputs J K Q Q S R JKQ n+1 00QnQn 011 100 11QnQn clock

7. Building a Counter using flip-flops °To count electrical pulses, feed signal into clock input °Chain a flip-flop output to next flip-flop clock to add extras bits to your counter D C Q Q D C Q Q D C Q Q D C Q Q input clock Q0Q0 Q1Q1 Q2Q2 Q3Q3 Q0Q0 Q1Q1 Q2Q2 binary base 10 negative edge triggered flip-flops

8. Shift Registers °We often need to shift bits left, eg to... °We do this using a shift register (eg built from flip-flops) D C Q Q D C Q Q D C Q Q D C Q Q input clock Q0Q0 Q1Q1 Q2Q2 Q3Q3 data

9. Registers °Registers store working data think of as a small scratch-pad of memory fast access °Data moves between registers on a... use a system.......... to ensure synchronisation °Can use N flip-flops to make an N-bit register (just like memory) °Add digital logic to perform further functions load preset data shift left shift right shift by n bits left or right count

10. Registers and databuses °Different registers can grab data from a common data bus - at different times Register 1Register 2 ALUop ALU Result RegisterStatus Register Control Load 1 Load 2 Load result Data Bus (32 bits wide) Memory Storage

11. °Real vs Ideal Components °Because voltages cannot change instantaneously, all real devices have propogation delays where the actual output lags behind that expected theoretically. While the voltage is changing, we have voltages that are not 0V or 5V that are often input to a second device. A device has some arbitrary cutoff (eg 2.5V) above which the input is interpreted as a true and below which as false. °For example, consider an inverter. When input goes 0V -> 5V, output goes 5V -> 0V but NOT instantly. When the input goes 5V -> 0V, output goes 0V -> 5V but NOT instantly.

12. Timing and Control by CPU °CPU generates control signals to co-ordinate operations such as memory read write Address Data 32 Write Address Decoder R5 R4 R3 R2 R1 R0 32 CPU Clk Read