1. Experiment 2 Questions 1. There are two methods that can be used to generate a complement function using a 2-input NAND gate. Draw a diagram detailing these two methods and explain how they work. Consider using the associated truth table in your explanation. 2. Answer the previous question for the 4-input NAND gate (7420). 3. An XOR gate can also be used as an inverter. Draw a circuit diagram detailing how this is done. Use a truth table in your description.

2. Experiment #3: Introduction to Function Reduction, Implementation, and Function Forms CPE 169 Digital Design Laboratory

3. Function Reduction General approach: make function smaller Underlying purpose: make it cheaper to implement the function. True definition dependent upon how “cheaper” is defined General correlation between a “reduced function” and an inexpensive implementation

4. Minimum Cost Implementation Based on definition of “cost” Cost has no absolute definition: –Could include: Cost of components (digital IC’s, circuit board,…) Cost of development (engineering labor, tools,…) Cost of manufacturing (tooling, test fixtures,…) –Component Costs change with: current part availability and/or pricing quantity discounts changes in technology Our metrics: # of IC’s # of Gates (including NOT gates) # of Gate Inputs # of Literals Experiment 3: minimum cost defined by the number of gates required to implement function.

5. Reducing Functions Computer-based methods –fast, concise but cookbook approach Boolean algebra –instructive but slow, error prone Karnaugh Maps –fun and exciting but limited to functions of 4 - 5 variables

6. Function Forms Boolean functions can be used to describe complex operations such as adders, multipliers, etc. Infinite number of different circuits can be used to implement any given function Standard function forms: –SOP (AND/OR) –POS (OR/AND) Several common forms are derived from SOP and POS using DeMorgan’s theorem

7. DeMorgan’s Theorems Can be used to generate different function forms : SOP-based AND/OR NAND/NAND OR/NAND NOR/OR POS-based OR/AND NOR/NOR AND/NOR NAND/AND

8. Experiment 3 Procedure Overview Download circuit from CPE 169 website –.bit file (Nexys) Analyze the implemented function –Create a Truth Table (include in report!!) Reduce the function to minimized SOP & POS forms –K-Maps (include in report!!) Implement the function on the Nexys and breadboard using discrete logic IC’s: (Don’t forget detailed schematics in report!!) –NAND / NAND form (SOP) –NOR / NOR form (POS) Compare results –Get Instructor Sign-off Sheet & signature (include in report!)

9. Note for Next Week Be sure to run through the B2 Spice A/D Tutorial (on the CPE-169 website) Brief overview of the logic circuit simulation tool you will be using in next week’s lab BEFORE LAB: