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Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle.

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Presentation on theme: "Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle."— Presentation transcript:

1 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design Victor Luyali C.E. Group Silicon Ensemble Results

2 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design Period = 2,9 ns Frequency = 344,82759 Total Dynamic Power = 54,4074 microwatts PDP = 157,78146 Silicon Ensemble Design Results

3 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design Freq (MHz) Max Delay ( ns) Max Area Dyn Power (uW) PDP 10001,041000000142,7775*148,4886 10001,041000000117,2635*129,9540 10001,08120000097,0772#*104,8434 10001,081000000121,9309#131,6854 9501,081000000121,3593*131,0680 9501,071000000121,4278*129,9277 9001,08900000121,3563#131,0648 9001,09800000121,0492131,9436 8001,091090000120,3473131,1786 10001,091090000122,0093132,9901 8001,091090000120,7934~131,6649 9001,091090000121,7751~*132,7349

4 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design The Silicon Ensemble Analysis show that there is a case of increased PDP. The Silicon Ensemble Analysis show that there is a case of increased PDP The increased Delay is responsible for this. Next Task: Optimization so as to reduce PDP as much as possible. Increased Critical Path,Fanout. Manual Placement.

5 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design

6 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Spezielle Anwendungen des VLSI-Entwurfs Special applications of VLSI design


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