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1 2004. 12. 7 Prof. JunDong Cho VADA Lab. Project.

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Presentation on theme: "1 2004. 12. 7 Prof. JunDong Cho VADA Lab. Project."— Presentation transcript:

1 1 2004. 12. 7 Prof. JunDong Cho VADA Lab. Project

2 2 Multi-Processor System On a Chip Platform  System Function  H/W & S/W Co-Design Platform Architecture Co-Design with Heterogeneous Components (ARM9, Teak DSP, FPGA)  DVB-T Performance Measurement.  H/W & S/W Performance measurement Method Development.  ARM + DSP + AMBA Bus + Communication Interface  H/W & S/W Co-Simulation with Mento Seamless Tool

3 3 DVB-T Receiver System Implementation  System Spec. DSP  Texas Instrument’s TMSC320C6701 DSP  166 MHz clock, (166 MIPS, 1.0 GFlops peak)  32 bits floating-point architecture/ addressing FPGA : XILINX Virtex XC2V6000 Memory : 16MB SDRAM, 256kB SBSRAM

4 4 Cryptography Accelerated Board & Chip  Feature (Board) PCI master/target interface MPC860 32bit CPU Co-Design. 1,000,000 gate FPGA Feature (Chip) Library : Hynix 0.25um Area : 200,000gate Operation Freq. : 100MHz

5 5 PCMCIA Card Type CableCard Prototype  System Function OOB Processor, Copy Protection System Conditional Access System PCMCIA Interface ARM926T Processor.

6 6 Mobile HomeCare System  System Spec. Intel Xscale PXA255 processor (400MHz) 16MB Flash, 32MB SDRAM Embedded Linux (2.4.18) 10Mbps wired ethernet, 11Mbps WLAN Jaurus PDA (Linux based)  Data flow (Gluco data) Gluco Meter -> RS232 -> WMI Board -> AP -> PDA PDA -> AP -> RMC Server

7 7 3D Image Processor Prototype Board  System Spec. FPGA : Xilinx 6,000,000gate SDRAM : 64MB*4, 16MB*2 USB2.0 Interface CMOS Image Sensor : 500F/S  Operation flow 1. CMOS Image Sensor 2.500Frame SDRAM store 3. 500Frame 3D processing & 500Frame store. 4. 30Frame Transfer to PC

8 8 VADA Lab. Hardware IP List  Communication Core  CDMA2000 Low Power Error Correction Codec  IS95 CDMA Searcher Core  Low Power Equalizer/FFT  DVB-T Core  Multimedia Core  MPEG-2 Motion Estimation Core  MPEG-2 DCT Core  CCD Sensor Interface Core.  Cryptography Algorithm HW Core  DES, SEED, RC4, RSA, ECC, SHA1, MD5,

9 9 VADA Lab. Hardware IP List  Computer Peripheral Core  PCI Master/Slave Interface Core.  MPC860/AMR Processor Control Core.  SDRAM/SRAM Memory Interface.  PCMCIA Interface Core.  I2C Interface Core.  Core Control SW  ARM9 Device Driver.  PCI Master/Target Device Driver.


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