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Мэдээллийн Технологийн Сургууль Монгол Улсын Их Сургууль Some features of creating GRID structure for simulation of nanotransistors Bolormaa Dalanbayar,

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Presentation on theme: "Мэдээллийн Технологийн Сургууль Монгол Улсын Их Сургууль Some features of creating GRID structure for simulation of nanotransistors Bolormaa Dalanbayar,"— Presentation transcript:

1 Мэдээллийн Технологийн Сургууль Монгол Улсын Их Сургууль Some features of creating GRID structure for simulation of nanotransistors Bolormaa Dalanbayar, Batnyam Battulga National Universiry of Mongolia School of Information Technology

2 Мэдээллийн Технологийн Сургууль Outline i. About SIT ii. Why parallel computation in SIT curricula? iii. Nanoelectronics development iv. Siesta and parallel processing in SIT v. Conclusion

3 Мэдээллийн Технологийн Сургууль Introduction Presented work – small GRID structure based Unicore software technology DFT simulation of a bulk silicon using Siesta package

4 Мэдээллийн Технологийн Сургууль School of Information Technology 1967 – First Radio-Electronic Engineers 1990 – Electronics Department 2002 – School of Information Technology

5 Мэдээллийн Технологийн Сургууль School of Information Technology Departments: Electronics Computer and Information Technology Communication Technology Research centers: Research center of NLP Research center of Mobile and Embedded technology Animation studio

6 Мэдээллийн Технологийн Сургууль Why parallel computation in SIT curricula? Nano electronics in Electronics curricula : 2006 Fundamentals of Nano electroncs Elective course in bachelor degree 2008 Specialization in master degree 2011 first masters

7 Мэдээллийн Технологийн Сургууль Why parallel computation in SIT curricula? 2010-2011 Matlab simulation (Landauer-Buttiker formalism, SC Iteration, NEGF,…) 2011-2012 First ab-initio simulation in Siesta (Linear-scaling DFT )

8 Мэдээллийн Технологийн Сургууль Nanoelectronics development Nanotransistor development: - Experimental - Computational Nanotransistor modeling : - physical process simulation (ab initio,…) - characteristic simulation (NEGF approach,…) - TCAD (Silvaco, Synopsis…)

9 Мэдээллийн Технологийн Сургууль Simulation and Method Solving the 3D Poisson equation for the electrostatic potential Solving the 2D, 1D Schrodinger equations Solving the coupled or uncoupled nonequilibrium Green function (NEGF) transport equations for the electron charge density. Numerical simulation of I D

10 Мэдээллийн Технологийн Сургууль Simulation and Method: Matlab The computed log(I D ) vs. V G transfer characteristics of a ballistic SNWFET with a SiO 2 insulator layer (k = 3:9 and 25)

11 Мэдээллийн Технологийн Сургууль Simulation and Method: Matlab The computed I D vs. V D common source characteristics of ballistic SNWFET with a HfO 2 insulator layer (k = 3:9 and 25)

12 Мэдээллийн Технологийн Сургууль Nanoelectronics development Many electron problem: Quantum Chemistry (Hartree-Fock, CI…) Quantum Monte Carlo Perturbation theory (propagators) Density Functional Theory (DFT) Very efficient and general BUT implementations are approximate and hard to improve (no systematic improvement)

13 Мэдээллийн Технологийн Сургууль Siesta and parallel processing in SIT Nano transistor (device physics) – atomistic models Gabriele Penazzi, PhD dissertation Rome, June 2010.

14 Мэдээллийн Технологийн Сургууль Siesta and parallel processing in SIT Nano transistor (device physics) continuous models Gabriele Penazzi, PhD dissertation Rome, June 2010.

15 Мэдээллийн Технологийн Сургууль Siesta and parallel processing in SIT Atomistic models: - Siesta - GROMACS - VASP - CASDEP - ABINIT …

16 Мэдээллийн Технологийн Сургууль Siesta and parallel processing in SIT Siesta Methods: - Born-Oppenheimer (relaxations, mol.dynamics) - DFT (LDA, GGA) - Pseudopotentials (norm conserving,factorised) - Numerical atomic orbitals as basis (finite range) - Numerical evaluation of matrix elements (3Dgrid)

17 Мэдээллийн Технологийн Сургууль Siesta and parallel processing in SIT Pseudopotential of Si:

18 Мэдээллийн Технологийн Сургууль Siesta and parallel processing in SIT Carrier charge:

19 Мэдээллийн Технологийн Сургууль Siesta and parallel processing in SIT Bulk Si

20 Мэдээллийн Технологийн Сургууль Siesta and parallel processing in SIT Used UNICORE 6

21 Мэдээллийн Технологийн Сургууль Conclusion Double site configuration

22 Мэдээллийн Технологийн Сургууль Conclusion Performed calculations in double site UNICORE GRID site: - Matlab code of NEGF - Feature selection Matlab code - DFT Siesta code - Band structure Siesta code

23 Мэдээллийн Технологийн Сургууль Conclusion Future plan: - Development of cluster - Testing of Torque - Repeating our calculations - Creation of education site map in UB

24 Мэдээллийн Технологийн Сургууль Thank you for attention A@Q?

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