1. 3D IC’s for Mobile Computing
GSA/ITAC April 2011
Paul Kempf

2. 3D IC’s for Mobile Computing (or Mobile Computing = Smartphone evolution)
Smartphone trends driving 3D IC’s
Technology for 2.5D & 3D
Through Silicon Via (TSV) for Memory
Interposers & Wafer Level Packages
Heterogeneous Integration
Embedded silicon
10 years in 2

3. Smartphone Component Footprint
Mainstream Smartphone
fewer IC’s each year
integration into a few subsystems
High-End Smartphone
die size limited SoC’s
integration has not kept pace with feature race
handhold size contraint
PCB
Area
(mm2)
Year

4. Torch 9800 uUSB connector Audio Codec SIM Card Holder WiFi/BT
uSD Card Holder
UMTS PA
EDGE Transceiver
RF Switch
SAW Filters
EDGE PA
Side 2
eMMC
GPS
PMIC
Analog BaseBand
ISP
RF PMIC
UMTS Transceiver
uP and Memory
EDGE Filters

5. Smartphone Part Count Mainstream Smartphone high level integration
lower cost
increasing performance
High-End Smartphone
mobile computing platform
packed with features
embedded memory
many radio connectivity
sensors
cameras
time-to-market is key
Component
Count (#)
Year

6. High-End Memory Performance
Wide IO DDR
LPDDR3 2ch
Wide IO SDR 2X
LPDDR2 2ch
LPDDR2
LPDDR1 2X

7. Lesson from Compute Servers
Power density driving 3D integration for servers
Mobile devices have extreme thermal constraints
- How long until mobile follows servers?
BiCMOS to CMOS analogy

8. Integration is dead Long live (3D) integration
Hybrid/Ceramic/Glass
Mixed Semiconductor
Technology
3DIC
Number of die in package
RF CMOS
2.5D
Mixed Signal
PoP
SiP
SoC
NOW
Year
(courtesy Yuan Xie, PENNSTATE)

9. 3D Applications in Mobile
Memory Speed Power Imaging Sensitivity RF Efficiency Power Mgt Size Connectivity Size

10. TSV Memory Stack LPDDR2 with TSV stack Applications Processor with TSV
(source: Texas Instruments)
Design standards required to scale-up supply base
mBump layout
Array configuration
Pin Assignments

11. Heterogeneous Integration
Silicon interposer advantages
Reduced die complexity
Mixed technologies
Fewer IO
Lower power
Wide interfaces
Mechanical Strength
(source: Amkor Technology, Inc.)

12. Cost-Efficient Heterogeneous Stacking
Heterogeneous integration is usually expensive
3D stacking: cost-efficient for heterogeneous integration
(Courtesy: Borkar, Intel)
(Courtesy: Yuan Xie, PENNSTATE)

13. Silicon Embeded Substrate
Space saving / Miniaturization
Reduction of IC bump pitches potentially leads to size reduction of the IC
SESUB can take over redistribution
Low height substrate of max. 300µm incl. the embedded ICs
Excellent EMI performance, good heat dissipation, high reliability
Roadmap to embed Thin-Film inductors, Thin-Film capacitors and other passive components
Integrated Shielding
(source: TDK-EPC Corporation)

14. Back Grinding Half Dicing Bumping
22. März 2017
SESUB Process Flow
Back Grinding
Half Dicing
Bumping
(source: TDK-EPC Corporation)

15. Plating Via Hole Chip Mounting Lamination Preparing L1-L2
22. März 2017
SESUB Process Flow
Plating
Via Hole
Chip Mounting
Lamination
Preparing L1-L2
(source: TDK-EPC Corporation)

16. SESUB Process Flow Under Fill SMT & CSP Mount Solder Ball Attach
22. März 2017
SESUB Process Flow
Under Fill
SMT & CSP Mount
Solder Ball Attach
Via Hole L1&L4
Lamination
Plating & Etching
SR Laminating
(source: TDK-EPC Corporation)

17. Cross-section of highly integrated SESUB module
22. März 2017
Cross-section of highly integrated SESUB module
SMD parts
Fine pitch connection µm (min.)
Layer 1
Bump
Layer 2
IC ( Si thickness: 50 µm )
Layer 3
Layer 4
BGA
Substrate thickness 300 μm
Line/space 40/40 µm (min)
Layer 1-2 via
Explanation of the SESUB design…
Messages:
Integration of IC with fine-pitch I/O connections
Thickness only 300 µm
Close line/space
Integrated BGA
SMD components can be mounted on the surface
Layer 2-3 via
Layer 3-4 via
(source: TDK-EPC Corporation)

18. PMU (Power Management Unit)
Molding Resign
Shielding Metal
Module size :10 x 8 x1,6mm
285pins 0.5mm pitch BGA, Ball size Φ0.25mm
Die : PM-IC die 5.0 x 5.0mm,
Digital die 2.8 x 2.4mm
31 components integrated
Metal Can Shield or Integrated Shield L L C
1.0mm L4 C C
1,6 mm L3
0.3mm L2 L1
<Cross Section>
0.1mm
VLS2520
C1005
MLP2012
MLP1608
C1608
C06
<Top View>
<Bottom View>
<IC embedding>
8mm
10mm
0.5mm
0.25mm
(source: TDK-EPC Corporation)

19. Connectivity Combo Module - R074
R054D = 113sq.mm
(9.5 x 11.9 mm)
R074 = 60sq.mm
(7.5 x 8 mm)
SESUB
size reduction of
45%
Buried Quad-Combo IC
(GPS-WLAN-BT-FM)
~31sq.mm
(source: TDK-EPC Corporation)

20. Mixed TSV and SESUB
(source: Yole Developpment)

21. 10 Years in 2 A Mobile Computing Revolution
Now
Performance improvement
Power reduction
Next
Sub-system integration
Miniaturization
Future
Laptop in your hand
Mobile revolution

22. Acknowledgements
Thanks to those who put together a lot of the original material for this review:
Yuan Xie, PENNSTATE
R. Schmidt, IBM
Texas Instruments
Amkor Technology, Inc.
TDK-EPC
Yole Developpment