1. Unit II Test Generation

2. Syllabus
Test generation for combinational logic circuits – Testable combinational logic circuit design – Test generation for sequential circuits – design of testable sequential circuits.

3. Test generation of Combinational logic circuit
4/21/2017
Test generation of Combinational logic circuit
One-dimensional sensitization path
Boolean difference
D-algorithm
Singular cover
Propagation D-cube
Primitive D cube
D-intersection
PODEM
Be sure everyone has a conduct sheet.
Re GROUND RULES:
1. In terms of allowed collaboration vs. individual work, ask if you are not sure.
2. Deactivate all cell phones or pagers during class unless you are on-call during your job.
3. No tape-recording permitted. Take notes.

4. Test generation Combinational circuit test generation
4/21/2017
Test generation
Combinational circuit test generation
random pattern test generation
algorithm
generate a random input
simulate and determine new faults detected
continue till desired stopping condition is met
advantages and issues
simple
when to quit?
how does it perform?
Be sure everyone has a conduct sheet.
Re GROUND RULES:
1. In terms of allowed collaboration vs. individual work, ask if you are not sure.
2. Deactivate all cell phones or pagers during class unless you are on-call during your job.
3. No tape-recording permitted. Take notes.

5. Test generation (contd.)
4/21/2017
Test generation (contd.)
Combinational circuit test generation
PODEM
basics of test generation
fault excitation
fault propagation
D notation
explain 5-value logic - 0, 1, x, D, U (D_bar)
Be sure everyone has a conduct sheet.
Re GROUND RULES:
1. In terms of allowed collaboration vs. individual work, ask if you are not sure.
2. Deactivate all cell phones or pagers during class unless you are on-call during your job.
3. No tape-recording permitted. Take notes.

6. Test generation (contd.)
4/21/2017
Test generation (contd.)
Combinational circuit test generation
PODEM (contd.)
algorithm sketch - informal
excite fault
choose an unassigned input
place it on decision tree
assign a value to the input and check fault site is D, U, X , or a constant.
D or U - excited
X - not yet excited
constant - same as fault value - BACKTRACK
Be sure everyone has a conduct sheet.
Re GROUND RULES:
1. In terms of allowed collaboration vs. individual work, ask if you are not sure.
2. Deactivate all cell phones or pagers during class unless you are on-call during your job.
3. No tape-recording permitted. Take notes.

7. Test generation (contd.)
4/21/2017
Test generation (contd.)
Combinational circuit test generation
PODEM (contd.)
propagate fault
choose an unassigned input
place it on decision tree
assign a value to the input and check if still D or U in the circuit and if propagated
if no D or U in the circuit D-frontier (intutively speaking - no gate with an input of D or U and output of X) then backtrack
Be sure everyone has a conduct sheet.
Re GROUND RULES:
1. In terms of allowed collaboration vs. individual work, ask if you are not sure.
2. Deactivate all cell phones or pagers during class unless you are on-call during your job.
3. No tape-recording permitted. Take notes.

8. Test generation (contd.)
4/21/2017
Test generation (contd.)
Combinational circuit test generation
PODEM (contd.)
flow chart from the paper
an example circuit for test generation to explain the concepts
back cone
backtrace - different from backtrack
backtracing for desired effects at the correct location
backtracing for desired value
backtracing using easy/hard heuristic
Be sure everyone has a conduct sheet.
Re GROUND RULES:
1. In terms of allowed collaboration vs. individual work, ask if you are not sure.
2. Deactivate all cell phones or pagers during class unless you are on-call during your job.
3. No tape-recording permitted. Take notes.

9. Test generation (contd.)
4/21/2017
Test generation (contd.)
Combinational circuit test generation
PODEM (contd.)
we have a test
can it detect more faults?
Fault simulate
fill x’s to detect even more faults
random fill
deterministic fill
fault dropping
Be sure everyone has a conduct sheet.
Re GROUND RULES:
1. In terms of allowed collaboration vs. individual work, ask if you are not sure.
2. Deactivate all cell phones or pagers during class unless you are on-call during your job.
3. No tape-recording permitted. Take notes.

10. Example Given a fault, identify a test to detect this fault1
1/0 A D 1
1/0 B F 1 C E
To detect D s-a-0, D must be set to 1.
Thus A=B=1.
Many delay faults can be detected by IDDQ testing because a circuit with a delay fault may imply that some transitions still exist in the circuit during steady state.
To propagate fault effect to the primary output
E must be 1. Thus C must be 0.
Test vector: A=1, B=1, C=0

11. Test generation of sequential circuit
4/21/2017
Test generation of sequential circuit
Iterative combinational circuit
State table method
Checking experience
Checking sequence
Be sure everyone has a conduct sheet.
Re GROUND RULES:
1. In terms of allowed collaboration vs. individual work, ask if you are not sure.
2. Deactivate all cell phones or pagers during class unless you are on-call during your job.
3. No tape-recording permitted. Take notes.

12. Test generation (contd.)
4/21/2017
Test generation (contd.)
Sequential circuit test generation
checking sequence approach
assume knowledge of state description
structural approach - gate level description
random testing
try random input
fault simulate
compute fault coverage
NOT VERY EFFECTIVE GENERALLY
Be sure everyone has a conduct sheet.
Re GROUND RULES:
1. In terms of allowed collaboration vs. individual work, ask if you are not sure.
2. Deactivate all cell phones or pagers during class unless you are on-call during your job.
3. No tape-recording permitted. Take notes.

13. Test generation (contd.)
4/21/2017
Test generation (contd.)
Sequential circuit test generation
structural approach - (contd.)
sequential test generation
time frame expansion model
example of a circuit
generate a test using combinational method
convert the combinational test to a test seequence
Be sure everyone has a conduct sheet.
Re GROUND RULES:
1. In terms of allowed collaboration vs. individual work, ask if you are not sure.
2. Deactivate all cell phones or pagers during class unless you are on-call during your job.
3. No tape-recording permitted. Take notes.

14. Design of testable combinational circuit
4/21/2017
Design of testable combinational circuit
The Reed-muller expansion technique
Three level OR-AND-OR logic
Use of control logic
Syndrome testable design
Be sure everyone has a conduct sheet.
Re GROUND RULES:
1. In terms of allowed collaboration vs. individual work, ask if you are not sure.
2. Deactivate all cell phones or pagers during class unless you are on-call during your job.
3. No tape-recording permitted. Take notes.

15. Design of testable sequential circuit
4/21/2017
Design of testable sequential circuit
Scan-path technique
Be sure everyone has a conduct sheet.
Re GROUND RULES:
1. In terms of allowed collaboration vs. individual work, ask if you are not sure.
2. Deactivate all cell phones or pagers during class unless you are on-call during your job.
3. No tape-recording permitted. Take notes.