1. 1 ERD Memory Review Paul Franzon, NCSU, paulf@ncsu.edu u Strengths u Areas for future focus u Opportunities Franzon

2. 2 ERD Strengths  Emphasis of writing leads to specific focus in chapter on need the access device for RRAM/CBRAM over other (more speculative) technology directions  i.e. Proportional to scope of opportunity  Emphasis of writing leads to a specific focus on potential for SCM  Cost emphasis appropriate for S-SCM  Excellent discussion of issues  Good summary of “further out” devices Franzon

3. 3 ERD Opportunity Areas End or roadmap DRAM scaling problems are already happening  charge/bit is going down,  crosstalk is emerging as an issue.  Not addressed as a driver in chapter (e.g. Table ERD-1, first entry)  ERD-2 gives 2024 scaling for DRAM and flash (9 / 8 nm)  Could this be considered misleading?  25 / 16 are currently considered current limits Franzon

4. 4 ERD Opportunity Areas  Energy efficiency is important in memory too  Hardly addressed in SCM section  Table ERD7:  Separate write and read current  Do we need to discuss retain issues?  SCM is specific to server class systems. Leaves out issues related to commodity memory and mobile  Hybrid memory likely to be different in mobile  Energy for sensor type systems Franzon

5. 5 ERD Opportunity Areas  Better coordination with architecture chapter  Circuit architecture open issue that is not addressed  New energy-efficient peripheral and integration circuits  Issues in hybrid memory integration for M-SCM could be addressed  E.g. Where did 10 9 endurance come from as a threshold?  Can we make this more solid or leave as a research direction?  Algorithms for reliability in hybrid  Good coordination on interfaces in devices chapter  Design for Test given emerging devices Franzon