1. CMS Tracker Upgrade Thanks to many CMS Tracker collaborators, past and present, too numerous to acknowledge individually Tracker web pages http://cmsdoc.cern.ch/Tracker/Tracker2005/TKSLHC/index.html Tracker Upgrade Wiki pages https://twiki.cern.ch/twiki/bin/view/CMS/SLHCTrackerWikiHome http://cmsdoc.cern.ch/Tracker/Tracker2005/TKSLHC/index.html https://twiki.cern.ch/twiki/bin/view/CMS/SLHCTrackerWikiHome

2. Geoff HallATLAS workshop Nov 20082 CMS Compact Muon Solenoid ECAL Tracker HCAL 4T solenoid Muon chambers Total weight: 12,500 t Overall diameter: 15 m Overall length 21.6 m Magnetic field 4 T First operation during 2008 pp collisions at 10 TeV CM energy

3. Geoff HallATLAS workshop Nov 20083 Upgrade to CMS CMS was designed for 10 years operation at L = 10 34 cm -2.s -1 – Max L1 trigger rate 100kHz & decision latency ≈ 3.2µs To operate at L = 10 35 cm -2.s -1 – most of CMS will survive & perform well with few changes But expect to upgrade trigger electronics & DAQ Notable exception is tracking system – Higher granularity is required to maintain current performance – Greater radiation tolerance, especially sensors ASIC electronic technologies will be adequate but 0.25µm CMOS, pioneered by CMS, will probably not be accessible – L1 trigger using tracker data is essential

4. Reminder of why this is needed Limited statistics – eg: – and time to reduce errors However, the environment is very challenging: Geoff HallATLAS workshop Nov 20084 10 35 10 34 Full LHC luminosity ~20 interactions/bx Proposed SLHC luminosity ~300-400 interactions/bx H  ZZ   ee, M H = 300 GeV vs luminosity

5. Physics requirements Essentially unknown until LHC data make it clear – general guidance as for LHC – granularity, pileup, … – but improving statistics in rare and difficult channels could be vital eg: whatever Higgs variant is discovered, more information on its properties than LHC can provide will be needed –  accessible by trilinear coupling An excellent detector is essential… …even better than LHC to cope with particle density & pileup – which should also be flexible to adapt to circumstances Geoff HallATLAS workshop Nov 20085 Expected HH production after all cuts in 4W -> l +/- l +/- + 4j mode –  = 0.07-018 fb -1 for m H = 150 – 200 GeV – with 3000fb -1 ≈ 200 – 600 signal events – plus significant background

6. Geoff HallATLAS workshop Nov 20086 TOB TID TIB TEC PD Current Tracker system Two main sub-systems: Silicon Strip Tracker and Pixels – pixels quickly removable for beam-pipe bake-out or replacement Microstrip trackerPixels ~210 m 2 of silicon, 9.3M channels~1 m 2 of silicon, 66M channels 73k APV25s, 38k optical links, 440 FEDs16k ROCs, 2k olinks, 40 FEDs 27 module types8 module types ~34kW~3.6kW (post-rad)

7. ATLAS workshop Nov 20087 Barrel & Forward Pixels July /Aug Geoff Hall

8. ATLAS workshop Nov 20088 A better tracker for SLHC? Present detector looks to be very powerful instrument No physics reason to improve spatial and momentum measurement precision – Key point is to maintain tracking and vertexing performance Heavy ion tracking simulations are encouraging: – Track density similar to SLHC – Extra pixel layer would restore losses Must optimise layout of tracker for – CPU-effective track finding – Trigger contributions Weakest point in present system is amount of material – Electron & photon conversions – Hadronic interactions

9. Geoff HallATLAS workshop Nov 20089 Ferenc Sikler Heavy ion performance of present tracker is remarkably good – Pixel seeding using 3 layers loses ~10% – but some pp events are more demanding, especially jets Granularity of tracker must increase anyway – because of leakage current/noise after irradiation as well as tracking

10. Material budget Reducing power is only way known to improve this – present requirements: pixels ~3.7 kW.m -2, µstrips < 0.1 – 0.4 kW.m -2 From Tracker perspective, least mass should be at lowest radii Geoff HallATLAS workshop Nov 200810

11. Geoff HallATLAS workshop Nov 200811 Tracker services Major constraint on upgraded system – Complex, congested routes – Heat load of cables must be removed – P cable = R cable (P FE /V s ) 2 – Cable voltage drops exceed ASIC supply voltages limited tolerance to voltage excursions Installation of services was one of the most difficult jobs to complete CMS It will probably be impossible to replace cables and cooling for SLHC P FE ≈ 33kW I=15,500A P S = 300kVA

12. Geoff HallATLAS workshop Nov 200812

13. Geoff HallATLAS workshop Nov 200813 Planning an Upgrade Project The SLHC planning assumption – Phase I to 2.3 x 10 34 (peak) ~ 2013 – Phase II to 10 35 from ~2017 How long is really needed? Developing and building a new Tracker requires ~10 years, eg – 5 years R&D – 2 years Qualification – 3 years Construction – 6 months Installation and Ready for Commissioning NB – this is an aggressive schedule – System design and QA important and cannot be downscoped we found problems during the later phases which needed time – Cost was a driver for LHC detectors from day one – Construction & Commissioning were major tasks, still ongoing CERN-AB-2008-065

14. Working Group organisation CMS Tracker R&D structure - active for ~18 months – recently added Task Forces on Layout, Power Options, Trigger Objective: develop R&D while Tracker layout is being defined Geoff HallATLAS workshop Nov 200814

15. State of activities Sensors – So far, strongly dependent on common R&D efforts – eg RD50 several R&D projects approved in CMS – Wide range of sensor designs in common mask set close to submission with HPK Engineering, cooling, material,… – Completion of installation has recently released effort – Expect to aim at Phase I pixel replacement as test bed for Phase II developments new cooling, power issues, data links all highly constrained by existing services & YB0 Readout – simulations in 0.13µm CMOS, studying link options – new readout architecture evolving Geoff HallATLAS workshop Nov 200815

16. Defining a new layout Present design suffered from limited simulations – we did not know how many layers would provide robust tracking – pixel system was a late addition, which has an important impact – the material budget estimate was not as accurate as desired A new tracker might be “easy” to design based on experience – but provision of trigger information adds a major complication – and the tools to model CMS at L = 10 35 were not in place – major uncertainties in power delivery, sensor type, readout architecture Hence big emphasis on simulation of new detector Geoff HallATLAS workshop Nov 200816

17. Possible scenario The first upgrade will involve the pixel system – simply because the inner layer must be replaced as it degrades The design for easy replacement simplifies our task – we can replace when we are ready to do so – and evolve it gracefully into the Phase II system How to upgrade: – design pixel system with 4 barrel layers and expanded endcap in first step install what we believe is needed, at the right time maximise benefits to CMS, including smooth transition fix mechanical envelope for future – study PT (doublet) layers to contribute to trigger – design outer tracker to match cost, power and performance needs Geoff HallATLAS workshop Nov 200817

18. BPIX Options for 2013 replacement/upgrade Option 0 1 2 3 4 5 Cooling C 6 F 14 CO 2 Readout analog 40MHz analog 40MHz analog 40MHz analog 40MHz  -tw-pairs digital 320MHz  -tw-pairs digital 640 MHz  -tw-pairs Pixel ROC PS46 as now 2x buffers 2xbuffer, ADC 160MHz serial 2xbuffer, ADC 160MHz serial Layer/Radii 4, 7, 11cm 4, 7, 11, 16cm Modules 768 1428 Power as now DC-DC new PS as 2008 R Horisberger May 2008 Geoff Hall18ATLAS workshop Nov 2008

19. Doubling the buffer size new ROC size 0.4mm mounting screw whole Doubling buffer size just ok in 0.25  CMOS  need extra 0.8mm chip periphery! No R&D need but verification with high rate test beam Design time & verification & testing at high beam rates 8-10 month L < 2.5x10 34 cm -2 s -1 Geoff Hall19ATLAS workshop Nov 2008

20. Barrel Pixel Option 5 4 layers of BPIX with or without ROC data buffers Build for sure: ~1300 perfect pixel modules 2 new barrel mechanics ( design & fabrication) 4 new supply tube halves ( design, fabrication & testing) ~2000 px-AOH fiber links new power supplies 2 more pxFED’s With present power cables, optical readout and cooling pipes absolute impossible !  cables are not there ! 4 layer system has 1.8x more modules than present 3 layer system Unless: have DC-DC step down converters to bring more power through cables high speed links to transmit 3.6x more data through same fibers have advanced bi-phase cooling ( e.g. CO 2 ) in same pipe x-section R Horisberger May 2008 Geoff Hall20ATLAS workshop Nov 2008

21. Outer readout Present architecture – analogue, unsparsified, analogue optical links, synchronous – external digitisation, cluster finding, zero suppression – 0.25µm CMOS, FP edge-emitting lasers, single-mode fibres Pros – works extremely well and easy to use with excellent diagnostic capability and noise robustness – occupancy insensitive – few power fluctuations – synchronous system easy to model and understand – cost effective, despite customisation Possible cons for future – new optolinks links required – analogue not an option – if analogue information to be preserved, on-detector ADC Geoff HallATLAS workshop Nov 200821

22. 22 binary architecture – un-sparsified digital O/P driver FE amp comp. digital pipeline digital MUX off-chip what about binary un-sparsified? much simpler than “digital APV” particularly for pipeline and readout side need fast front end and comparator => more power here but no ADC power and simpler digital functionality will consume less allows retention of features we like simpler synchronous system no FE timestamping data volume known, occupancy independent (so no trigger-to-trigger variation) but less diagnostics (can measure front end pulse shape on every channel in present system some loss of position resolution, common mode immunity) binary, un-sparsified is an option we are considering v th slow control, bias, test pulse, …… M Raymond TWEPP 08 ATLAS workshop Nov 2008

23. 23 0.13  m preamp/shaper – 2 supply rails only IPRE IPSF ISHA ISSF C SENSOR C fp C C fs Cload simulated FE amplifier performance for short strips (C SENSOR ~ 5 pF) choose preamp and shaper input device currents (and Rfs) to achieve 50 and 20 nsec CR-RC pulse shapes simulated pulse shapes (C SENSOR = 5 pF) Rfs peaking time 50 ns20 ns IPRE [uA]4090 IPSF [uA]15 ISHA [uA]1030 ISSF [uA]3515 total [uA]100150 power [uW]120180 noise [e]800890 => for short (~few cm) strips can get quite good preamp/shaper noise performance for > factor 5 less than APV (~1 mW) even with only 2 rails speed pipe capacitance 0.13  m simulation example M Raymond TWEPP 08 ATLAS workshop Nov 2008

24. Simulations status First emphasis on developing tools and ensuring they work – significant discoveries along the way – much effort needed, mostly part time – unknown errors, absence of certain expected features (pileup!), bugs, CPU time, hard-wired detector descriptions,… Software team set ambitious goals (next slide) Now have two strawmen models for detailed studies – plus layout tool to evaluate quickly basic features of different designs Geoff HallATLAS workshop Nov 200824

25. ATLAS workshop Nov 2008 25 Goals of the Simulations Group Perform simulations & performance studies: Must simulate The physical geometry, including numbers & location of layers, amount of material, “granularity” (e.g. pixels, mini-strips, size and thickness) The choice of readout, (e.g. technology, speed, latency, numbers of bits) Types of material, or technology (e.g. scattering, radiation hardness, noise) Tracking strategy and tracking algorithm Trigger strategy, trigger technology, and trigger algorithm Develop a common set of software tools to assist these studies For comparisons between different tracking system strategy/designs For comparisons with different geometries, and with CMS@LHC To include sufficient detail for optimization (realistic geometry, etc.) For comparisons between different tracking trigger strategy/designs Develop set of common benchmarks for comparisons Maximize the overlap of these common software tools with those in use for CMS@LHC (assist current efforts where possible) Get good integration between Tracker and (Tracking) Trigger design

26. ATLAS workshop Nov 2008 26 More Realistic Strawman A A working idea from Carlo and Alessia Take current Strawman A and remove 1 “TIB” and 2 “TOB” layers Strawman A r-phi view (RecHit ‘radiography’) 4 inner pixels 2 TIB strixels Adjust chn count 2 TIB short strips Remove 1 2 TOB strixels Adjust chn count 4 TOB short strips Remove 2

27. ATLAS workshop Nov 2008 27 More Realistic Strawman B Adjust granularity (channel count) of Strawman B layers Keep the TEC for now until someone can work on the endcaps Strawman B r-phi view (RecHit ‘radiography’) r-z view

28. Geoff HallATLAS workshop Nov 200828 Why tracker input to L1 trigger? Single µ and e L1 trigger rates will greatly exceed 100kHz – similar behaviour for jets increase latency to 6.4µs but maintain 100kHz for compatibility with existing systems, and depths of memory buffers Single electron trigger rate ≈ few GeV/bx/trigger tower Isolation criteria alone are insufficient to reduce rate at L = 10 35 cm -2.s -1 5kHz @ 10 35 L = 2x10 33 L = 10 34 muon L1 trigger rate

29. The track-trigger challenge Impossible to transfer all data off-detector for decision logic so on-detector data reduction (or selective readout) essential – The hit density means high combinatorial background – Trigger functions must not degrade tracking performance What are minimum track-trigger requirements? (My synthesis) – single electron - an inner tracker point validating a projection from the calorimeter is believed to be needed – single muon - a tracker point in a limited  window to select between ambiguous muon candidates & improve p T because of beam constraint, little benefit from point close to beam – jets – information on proximity/local density of high p T hits should be useful – separation of primary vertices (ie: 300-400 in ~15cm) – a combination of an inner and outer point would be even better Geoff HallATLAS workshop Nov 200829

30. readout electrodes Geoff HallATLAS workshop Nov 200830 Possible approaches Limited number of proposals so far – try to send reduced data volume from detector for further logic – eg factor 20 with p T > few GeV/c? Use cluster width information to eliminate low p T tracks (F Palla et al) – simple but thinner sensors may limit Compare pattern of hits in contiguous sensor elements in closely spaced layers – p T cut set by angle of track in layer – simple logic but with unrealistically small elements can it be applied with coarser pixels? – understanding power & speed issues requires more complete electronic design J Jones et al

31. 31 possible PT module for inner layer 2 x 2.5mm Correlator ASIC data 25.6 mm 64 x 2 data 2 layer stacked tracking approach 80 mm x 25.6 mm sensors segmented into 2.5 mm x 100  m pixels tiled with readout chips – could be wire bonded for easy prototyping readout chip ideas (see *) each chip deals with 2 x 128 channel columns use cluster width discrimination to reduce data volume readout chip 12.8 mm 128 channels PT module x32 * http://indico.cern.ch/getFile.py/access?contribId=15&sessionId=2&resId=1&materialId=slides&confId=36581 80 mm correlator compares hit pattern and address from both layers if match then shift result off-detector data volumes need to transmit all correlated hit patterns every BX predicted occupancy + reduction from correlation => 1 link can serve 2 PT modules link power need ~ 3000 PT modules for 3m length cylinder, r=25cm so 1500 links (@2.56 Gbps) => 3 kW @ 2W / link readout power 50  W / pixel (extrapolate from current pixels) => 2.4 kW for 8192 x 2 x 3000 channels => this will not be a low power layer G Hall, M Pesaresi M Raymond ATLAS workshop Nov 2008

32. 32 P t - Trigger for TOB layers 2mm Strip Read Out Chip 2 x 100  pitch with on-chip correlator Hybrid 50mm strips 1mm 2mm 2 x DC coupled Strip detectors SS, 100  pitch ~8CHF/cm 2 wire bonds spacer W.E. / R.H. track angular resolution ~20mrad  good P t resolution Two-In-One Design bond stacked upper and lower sensor channels to adjacent channels on same ASIC no interlayer communication no extra correlation chip just simple logic on readout chip, looking at hits (from 2 layers) on adjacent channels R Horisberger* W Erdmann 32 http://indico.cern.ch/getFile.py/access?contribId=3&sessionId=0&resId=0&materialId=0&confId=36580 * ATLAS workshop Nov 2008

33. 33 Correlation Algorithm Stub generation A stub is created when both the row and column difference lie within a given range. e.g. row offset = 3 0 ≤ row window ≤ +1 0 ≤ column window ≤ +1 Upper Lower Pass Fail 100μm

34. ATLAS workshop Nov 200834 Algorithm Performance Cuts optimised for high efficiency: Row window = 2 pixels Column window = 3 pixels @ 1mm, 2mm; 4 pixels @ 3mm; 6 pixels @ 4mm p T discriminating performance of a stacked layer at r=25cm for various sensor separations using 10,000 di-muon events with smearing Sensor separation is again an effective cut on p t – as with the stacked strips Again, the width of the transition region increases with separation. Due to: - pixel pitch - sensor thickness - charge sharing - track impact point Efficiencies decrease with sensor separation due to the larger column window cuts – sensor acceptances and fake containment are issues

35. Future power estimates Some extrapolations assuming 0.13µm CMOS – Pixels 58µW -> 35µW/pix NB sensor leakage will be significant contribution – Outer Tracker:3600 µW -> 700µW/chan Front end500µW (M Raymond studies) Links170µW (including 20% for control) – PT layers: 300µW/chan - most uncertain Front end 50µW (generous extrapolation from pixels) Links 100µW (including 20% for control) Digital logic 150µW (remaining from 300µW) 100µm x 2.5mm double layer at R ≈ 25cm => 11kW More detailed studies needed – sensor contribution not yet carefully evaluated – internal power distribution will be a significant overhead Geoff HallATLAS workshop Nov 200835

36. Power delivery Perhaps the most crucial question – although estimates of power are still imprecise, overall requirements can be estimated – we must reduce sensor power with thin sensors finer granularity should allow adequate noise performance – and attempt to limit channel count to minimum compatible with tracking requirements (simulations!) total readout power expected to be ~25-35kW – in same range as present system so larger currents required Radical solutions required – serial powering or DC-DC conversion – Task Force to answer soon if we should adopt a baseline solution Geoff HallATLAS workshop Nov 200836

37. Conclusions CMS is trying systematically to develop a new Tracker design – using simulations to define new layout We are very satisfied with the prospects for the present detector – but would like to reduce the material budget – and achieve similar performance The largest challenges are – power delivery and distribution – provision of triggering data – the schedule – but many developments of sensors, readout, cooling,… are also expected Geoff HallATLAS workshop Nov 200837

38. BACKUPS Geoff HallATLAS workshop Nov 200838

39. Collimation phase 2 Linac4 + IR upgrade phase 1 New injectors + IR upgrade phase 2 Early operation Geoff Hall 39 ATLAS workshop Nov 2008

40. Collimation phase 2 Linac4 + IR upgrade phase 1 New injectors + IR upgrade phase 2 Early operation Geoff Hall 40 ATLAS workshop Nov 2008

41. Tracker related R&D Projects 41 Proposal titleContact DateStatus Letter of intent for Research and Development for CMS tracker in SLHC eraR Demina 14.9.06Approved Study of suitability of magnetic Czochralski silicon for the SLHC CMS strip tracker P Luukka, J Härkönen, R Demina, L Spiegel 31.10.07Approved R&D on Novel Powering Schemes for the SLHC CMS TrackerL Feld 3.10.07Approved Proposal for possible replacement of Inner Pixel Layers with aims for an SLHC upgradeA Bean 31.10.07Approved R&D in preparation for an upgrade of CMS for the Super-LHC by UK groups WP1: Simulation studies/ WP2: Readout development/ WP3: Trigger developments G Hall 31.10.07Approved The Versatile Link Common ProjectF Vasey, J Troska 11.07Approved 3D detectors for inner pixel layersD Bortoletto, S Kwan 12.07Received Proposal for US CMS Pixel Mechanics R&D at Purdue and Fermilab in FY08D Bortoletto, S Kwan 12.07Received R&D for Thin Single-Sided Sensors with HPKM Mannelli 7.2.08Received An R&D project to develop materials, technologies and simulations for silicon sensor modules at intermediate to large radii of a new CMS tracker for SLHC F Hartmann, D Eckstein 6.3.08Approved Development of pixel and micro-strip sensors on radiation tolerant substrates for the tracker upgrade at SLHC M de Palma 9.4.08Received Power distribution studiesS Kwan 15.6.08Approved Cooling R&D for the Upgraded TrackerD Abbaneo 21.07.08Approved First Level Trigger based on TrackingF Palla 4.11.08Received ATLAS workshop Nov 2008Geoff Hall

42. ATLAS workshop Nov 200842 Calorimeter Algorithms e/photon tau jet Electron/photon – Large deposition of energy in small region, well separated from neighbour tau jet – Isolated narrow energy deposition – simulations identify likely patterns to accept or veto

43. Jet triggers The rates for electromagnetic triggers as a function of threshold for various types of event (left: jet events, middle: H->4e, right H->  ) at a luminosity of 2x10 33 cm -2.s -1 [Physics TDR Vol 1]. Scaling to 10 35 cm -2.s -1, it is clear that typical single isolated electron rates would be far higher than tolerable for practical thresholds. Geoff HallATLAS workshop Nov 200843

44. Electron triggers Rejection vs efficiency for electron identification obtained from the HLT pixel matching and low (left) and high (right) luminosity [Physics TDR Vol 1]. The upper curve shows the performance with the existing pixel detector. Geoff HallATLAS workshop Nov 200844

45. 45 estimated link power contribution LHC unsparsified analog0.36 Gb/s (effective) 2 / analog fibre 60 mW 230  W SLHC digital APV no sparsification2.5 Gb/s32 / GBT~ 2W 490  W SLHC digital APV with sparsification2.5 Gb/s256 / GBT~ 2W 60  W SLHC binary unsparsified2.5 Gb/s128 / GBT~ 2W 120  W link speed # of 128 chan. chips/link power per link link power/ sensor chan. LHC unsparsified analog 230  W / sensor channel: ~ 10% of overall channel budget need to do better at SLHC (e.g. 10% of 0.5 mW = 50  W) SLHC digital APV without sparsification not viable link power contribution too high (no. of channels will increase at SLHC) SLHC digital APV with sparsification appears best but can only be achieved with extra buffering between FE chips and link more chips to develop, some additional power SLHC binary unsparsified next best has strong system advantages no. of chips / link depends on estimations of data volume – some details in backup slides ATLAS workshop Nov 2008