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General Fixed Radix Number Systems Nonredundant Positive radix, ß n digits in digit set Vector:

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Presentation on theme: "General Fixed Radix Number Systems Nonredundant Positive radix, ß n digits in digit set Vector:"— Presentation transcript:

1 General Fixed Radix Number Systems Nonredundant Positive radix, ß n digits in digit set Vector:

2 General Fixed Radix Number Systems For Given Radix and n, how many number systems? ANSWER: Number equal to all possible permutations of n choose –1 (or +1), Choose -1 Positive Radix Negative Radix Of these, 1 is Pos. Radix 1 is Neg. Radix The following is the Radix-complement:

3 General FR Number Systems - Properties Largest Representable Integer Smallest Representable Integer p i are Digits of P

4 General FR Number Systems - Properties Using the p i Expression and Forming the Radix Polynomial for P digit weight Define as Q

5 General FR Number Systems - Properties Q is the value represented by the following n-tuple if all i =1 For N, the Smallest Representable Value:

6 General FR Number Systems - Properties Using Similar Analysis as With the Case of P: digit weight Define as Q

7 General FR Number Systems –Symmetry Summarizing: Where In General These Bounds are Asymmetric Measure of Asymmetry is: Therefore, Q is a Measure of Asymmetry for Generalized Fixed Radix Number Systems

8 GFRNS – Asymmetry Examples Consider the Negative Radix System: Asymmetric Range: n even   times as many negative as positive values n odd   times as many positive as negative values 2’s Complement: (1 more negative number) System: (1 more positive number)

9 GFRNS – Complement Recall that a complement of a digit, x i, is: The Complement of a Value, X, is Calculated as: Q X Thus,

10 Signed-Digit Number Systems Fixed radix (positional) Allows each digit to carry a sign example This signed digit (SD) is a new definition of the digit complement

11 Signed-Digit Example for a total of 19 possible digits If n = 2 199 values, however there are 19 2 = 361 representations possible which implies this is a redundant number system

12 Signed-Digit Example - Redundancy 19 possible digits 199 values and 19 2 = 361 representations implies redundancy Example redundant representation: For n = 2, range is Redundancy Index,  =  +  + 1 – r for digit set is [- ,  ] Here,  = 9 + 9 + 1 – 10 = 9, but if  = 0 &  =9, then  = 0.

13 Restricting Redundancy

14 Signed-Digit Characteristics Positive radix, ß > 0 X = 0 is unique Easy to convert Constant Delay for Add/Sub Regardless of Word Size

15 Breaking the Carry Chain Using SD Can make sum only a function of two digit positions Carry-Free Addition Algorithm Step 1: Find interim sum w i and transfer digit t i+1 where and Step 2: Find final sum s i positional sum p i

16 Signed Digit Addition Hardware

17 SD Addition Example Let a = 6 for r = 10

18 SD Addition Example (Continued) Let X = 1634, Y = 3366 Using normal addition produces a carry chain But by the carry-free algorithm

19 Converting Decimal to SD Let r = 10, a = 6 Consider the value as x i + y i and use algorithm Converting from SD to decimal – just sum plus and minus weights 2030 – 204 = 1826

20 Selecting a to Eliminate Carry Chain in SD For no carry, require

21 Selecting a to Eliminate Carry Chain in SD

22 Binary SD Addition Implies no guarantee that s i = w i + t i will not produce a carry Looking at algorithm: Step 1:

23 Unmodified Binary SD Addition Table x i,y i t i+1 wiwi Step 2: Based on calculation of w i and t i+1 Note: redundancy allows choices for w i and t i+1

24 How Useful is Unmodified Table? Works if operands do not contain If operands contain only 0’s and 1’s, no carry generated. Example Why not use this approach to break carry chain for unsigned binary number?

25 Limitations of Table Example (-9) 10 + (29) 10 Does not work if operands contain

26 SD Addition Table Choices Takagi, 1985

27 Modified Binary SD Addition Table x i,y i x i-1,y i-1 - neither isat least one is neither isat least one is -- t i+1 wiwi

28 Repeating Example with Modified Table Example (-9) 10 + (29) 10

29 Two SD Encodings x Encoding 1 x h x l Encoding 2 x h x l 4!=24 possible encodings Only nine are distinct under permutation and logical negation two’s complement

30 Encoding 1 Satisfies simple relation x = x l - x h and 11 has a valid numerical value of 0. SD to two’s complement conversion performed by two’s complement subtraction

31 Encoding 2 Satisfies relation x i = -2x i h + x i l This means that x i l and x i-1 h have the same weight Also simplified addition table possible by regrouping bits

32 Two’s Complement/BSD Conversion Two’s Complement to SD Bits can be encoded directly with MSB negative one BSD to Two’s Complement One algorithm simpler than complete binary adder z i is two’s complement result c 0 = 0 Example -10 10

33 Binary SD Representations Representation of a value with the minimum number of non-zero digits – Important in multiplication and division since each zero eliminates an operation Minimal SD representation of X = 5 X = 5, n = 4, r = 2

34 Alternate Class of BSD Addition Tables* * see M. Thornton, A Signed Binary Addition Circuit Based on an Alternative Class of Addition Tables x i,y i t i+1 wiwi Motivation: Previous tables based on calculation of where w i and t i require 2-bit encoding Alternative restricts these values to {0,1} or {1,0} Note: In the discussion c i will be used in place of t i and u i for w i

35 Basic Idea for Alternate SBD Representation Restrict Add 2b i+1 since it is “borrowed” from i+1 column Subtract b i since it is “borrowed” from i-1 column

36 Basic SD Addition Tables 101 1210 0101 1012 101 1100100 0010001 1000110 Both have inherent propagation limitations

37 Alternative 1 BSD Addition Table* 101 1 1 0 1 1 0 1 1 0 1 1 0 0 1 0 0 0 1 0 0 1 0 1 1 1 0 0 0 1 1 01 1 0 b i+1 c i+1 u i b i =1 b i =0 * Table 2 of Thornton paper

38 Alternative 2 BSD Addition Table* 101 1 0 1 0 0 1 1 1 0 1 0 1 0 0 0 0 1 1 0 0 10 1 1 1 0 1 1 1 0 1 0 0 1 b i+1 c i+1 u i b i =1 b i =0 * Table 4 of Thornton paper

39

40 Encoding Scheme For Even Parity* Choose Then each successive pair of signed binary digits can be grouped with even parity Single bit error coverage over digit pairs * see M. Thornton, Signed Binary Addition Circuitry with Inherent Even Parity Outputs


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