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CMS Upgrade Workshop November 19-21 Fermilab POWER DISTRIBUTION SYSTEM STUDIES FOR THE CMS TRACKER Fermilab,University of Iowa and University of Mississippi Marcos Turqueti (turqueti@fnal.gov)
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Outline Report on the ongoing work at ESE/CD on Power Distribution for the CMS Tracker. Discuss possible improvements on the ongoing work. Summarize the objectives of ESE/CD on Power Distribution for the CMS Tracker. Discuss the current options available for the Upgrades.
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What are the activities being carried out at ESE right now? DC-DC power distribution tests using the PSI46. Data over power utilizing the PSI46 readout chip as target. Simulation tools development for the CMS tracker power design.
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DC-DC Power Distribution Tests Tests performed in using the CMS pixel readout chip, the test can be scaled from one to hundreds of ROCs. Compare performance comparison between the current power scheme and the DC-DC system using different parameters. Key performance parameters that will be checked; power line noise, communications integrity and ROC performance. Key DC-DC parameters that will be studied are: DC voltage level and data over power with different cable lengths. Key hardware pieces that will be tested; switching voltage regulators with different PCB embedded inductors, switching capacitor regulators, data-over power encoding circuit and PSI46 regulation circuit.
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DC-DC Setup 1) CURRENT CMS LOW VOLTAGE DISTRIBUTION SYSTEM 2) PROPOSED DC-DC DISTRIBUTION SYSTEM Personal Computer with CMS Power distribution Software Gigabit Ethernet CAPTAN DAQ System PSI46 CARD PSI46 ANALOG OUT PSI46 CONTROL ENCODED PSI46 DATA (TDMA)+POWER TDMA ENCODER + DC-DC CONVERSION 20 xPSI46 ROCs
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Test Setup at FNAL 20 xPSI46 ROCs CAPTAN DAQ System Gigabit Ethernet PSI46 ANALOG OUT PSI46 Control signals System currently available.
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3) EXPANDED DC-DC DISTRIBUTION TEST SYSTEM X 24 CAPTAN NODE 6 CARDS ONE CAPTAN NODE WITH 6 DCB CARDS CAN SUPPORT 24 BOARDS, THIS TRANSLATES TO 480 ROCS PER NODE
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The DC-DC/encoder board EMBEDDED INDUCTORS MICRO CARDS TO CAPTAN CONNECTOR (SATA) TO PSI46 ROCs BOARD- ANALOG (SATA) TO PSI46 ROCs BOARD- DIGITAL A3P250 FPGA INDUCTOR BASED SWITCH STEP-DOWN REGULATORS LINEAR REGULATORS ADC JTAG DC-DC STEP- DOWN BOARD CAPACITOR SWITCH STEP-DOWN REGULATORS OROR EMBEDDED INDUCTORS MICRO CARDS
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→ Ck ± → Tki ± ← Tko± → Tr ± → I2C ± → R ◄ AOUT TDMA -180MHZ ADC_SAMPLETKOUT 0 1 V LVDS (1.25) I2c+reset TRG TK 20V 0 0 00 0 11 t V TDMA - 180MHZ LVDS (20.0) How It Works ADC, 105 Mbps 3.5 1.8V 2.5V FPGA SWITCHED REG BOARD PSI ROC MODULE Will be available in three weeks.
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PINGA Software for CAPTAN Noise and Threshold Dispersion
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What are the Costs of a Given Design? Material Budget Power Dissipation/Efficiency Reliability Detector Performance Degradation How Does the System Evolve? Failure Modes Coupling Effects Probabilities of Failures Change Power and Performance Change SIMULATION
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Possible Simulation Approach: Select a Power Distribution Design Implement the Corresponding Model Formulate a Cost Function Integrate the System in Time to Get a Sample Sequence Update the Cost Function in Time Compute Average Cost for the Design We are now gathering info on the current system, in particular the observed failure modes, its impact and frequency on the detector performance. SIMULATION
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Complete Current Test System Development. Implement same Test System for Serial Powering Concept with PSI46 Modules. One possible implementation is using the Serial Power Interface Chip, see Marcel Trimpl presentation. Simulation Software Development. Next Steps
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