1. Chapter 3 Embedded Computing in the Emerging Smart Grid Arindam Mukherjee, ValentinaCecchi, Rohith Tenneti, and Aravind Kailas Electrical and Computer Engineering Department, University of North Carolina, Charlotte

2. Information technology back bone of smart grid Compute and Control Communication Data

3. Smart meters in advanced metering infrastructure sensor/control information Renewable and less predictable power sources status/control information Data collected by remote terminal units from field units

4. Communication Secure transfer encryption/decryption State of the art transfer protocol for communication via power lines/wireless/dedicated wirelines Two way communication at all levels

5. Compute and Control Computations for signal processing Computations for cyber security Power flow calculations for control Intelligent control for optimal power usage

6. Computations in smart grid? Analysis and Control Sensing and Measurement infrastructure Communication and security Computations Commun ication and Security Analysis and Control Sensing and Measurem ent infrastrutc ure

7. Intel Atom (state of the art) Advantages In-order execution Low power Lesser die space Disadvantages Memory access has long latencies for floating point and SIMD instructions In-order execution (Long latency) Intel Atom Pine trail

8. ARM Cortex A8 (state of the art) Advantage In-order cores Low power Lesser area Disadvantages Deep pipelines, introduce latency Instruction level parallelism cannot be exploited ARM Cortex A8 neon integer pipeline

9. New processor? Microarchitecture is currently not optimized for the smart grid applications Customize architecture for specific computations for better efficiency Efficiency Latency and throughput requirements for real time applications Consume lesser power compared to state of the art processors One embedded processor to handle varied applications

10. Design space exploration

11. Design space exploration - Basic Steps Identify the application and profile the benchmarks Identify the processor simulators Optimize the architecture

12. Applications Power flow studies – Aid in control Fast fourier transform – Signal processing Blowfish encryption – Security The benchmarks are optimized based on the architecture.

13. Processor simulators Casper - A Sparc V9 based Cycle accurate chip-multithreaded Architecture Simulator for Performance, Energy and aRea analysis. Based on open sourced Suns Ultra Sparc-T1 architecture. MPTLSim - A cycle-accurate, full-system simulator for x86-64 multicore architectures with coherent caches MV5 - An Event-driven, Cycle-accurate Simulator for Heterogeneous Manycore Architectures

14. Casper Customize Cores on chip Threads per core L1, L2 cache size/associativity/banks Size of load miss queue, missed instruction list, data fill queue, branch address buffer, store buffer, cache fill buffer Set instruction/data cache latency Measure Power Area CPI Throughput Latency Pipeline stalls Wait time for threads Instruction/data cache misses

15. MPTLSim All parameters listed in Casper are configurable in MPTLSim Additional features Full system capability Implements branch prediction Out of order execution (no In-order execution) Configure RTL models of the pipeline units

16. MV5 Implements all features of the earlier simulators (no support for full system emulation) Additional features X-86, Alpha, Sparc all architectures are supported Heterogeneous configuration in terms of the microarchitecture features like SIMD/Out of order/In order are supported Different On chip networks can be explored Run different benchmarks on different cores Example configuration

17. Optimal configuration Few methods Linear/Non-linear regression Genetic algorithms Artificial neural networks Strength Pareto evolution Fuzzy logic Algorithms for best initial training set Random sampling Placket-Burman design of experiments Latin hypercube Configurable parameter set Simulate the architecture and find the value to be optimized Optimizer predicts next set of parameters

18. Open research Benchmark suite development for the smart grid applications Operating system for the smart grid applications