1. Lecture 31 PLAs and Arithmetic Logic Unit (ALU)
Give qualifications of instructors:
DAP
teaching computer architecture at Berkeley since 1977
Co-athor of textbook used in class
Best known for being one of pioneers of RISC
currently author of article on future of microprocessors in SciAm Sept 1995 RY
took 152 as student, TAed 152,instructor in 152
undergrad and grad work at Berkeley
joined NextGen to design fact 80x86 microprocessors
one of architects of UltraSPARC fastest SPARC mper shipping this Fall

2. Programmable Logic Array
A ROM is potentially inefficient because it uses a decoder, which generates all possible minterms. No circuit minimization is done.
Using a ROM to implement an n-input function requires:
An n-to-2n decoder, with n inverters and 2n n-input AND gates.
An OR gate with up to 2n inputs.
The number of gates roughly doubles for each additional ROM input.
A programmable logic array, or PLA, makes the decoder part of the ROM “programmable” too. Instead of generating all minterms, you can choose which products (not necessarily minterms) to generate.

3. The left part of the diagram replaces the decoder used in a ROM.
A blank 3 x 4 x 3 PLA
This is a 3 x 4 x 3 PLA (3 inputs, up to 4 product terms, and 3 outputs), ready to be programmed.
The left part of the diagram replaces the decoder used in a ROM.
Connections can be made in the “AND array” to produce four arbitrary products, instead of 8 minterms as with a ROM.
Those products can then be summed together in the “OR array.”
Inputs
Outputs
AND array
OR array

4. K-map minimization
The normal K-map approach is to minimize the number of product terms for each individual function.
For our three functions, this would result in a total of six different product terms.
V2 V1 V0
V2 = m(1,2,3,4)
V1 = m(2,6,7)
V0 = m(4,6,7)

5. We could express V2, V1 and V0 with just four total products:
PLA minimizatio
For a PLA, we should minimize the number of product terms for all functions together.
We could express V2, V1 and V0 with just four total products:
V2 = xy’z’ + x’z + x’yz’ V1 = x’yz’ + xy V0 = xy’z’ + xy
V2 = m(1,2,3,4)
V1 = m(2,6,7)
V0 = m(4,6,7)

6. So we can implement these three functions using a 3 x 4 x 3 PLA:
V2 = m(1,2,3,4)= xy’z’ + x’z + x’yz’
V1 = m(2,6,7) = x’yz’ + xy
V0 = m(4,6,7) = xy’z’ + xy

7. ROMs provide stable storage for data
Summary
ROMs provide stable storage for data
ROMs have address inputs and data outputs
ROMs directly implement truth tables
ROMs can be used effectively in Mealy and Moore machines to implement combinational logic
In normal use ROMs are read-only
They are only read, not written
ROMs are often used by computers to store critical information
Unlike SRAM, they maintain their storage after the power is turned off
ROMs and PLAs are programmable devices that can implement arbitrary functions, which is equivalent to acting as a read-only memory.
ROMs are simpler to program, but contain more gates.
PLAs use less hardware, but it requires some effort to minimize a set of functions. Also, the number of AND gates available can limit the number of expressible functions.
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

9. Main computation unit in most computer systems
Overview
Main computation unit in most computer systems
ALUs perform a variety of different functions
Add, subtract, OR, AND…
Example: ALU chip (74LS382)
Has data and control inputs
Individual chips can be chained together to make larger ALUs
ALUs are important parts of datapaths
ROMs often are used in the control path
Build a data and control path
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

10. … Arithmetic Logic Unit Arithmetic logic unit functions
DataA
DataB
Arithmetic logic unit functions
Two multi-bit data inputs
Function indicates action (e.g. add, subtract, OR…)
DataOut is same bit width as multi-bit inputs (DataA and DataB)
ALU is combinational
Conditions indicate special conditions of arithmetic activity (e.g. overflow).
Function
ALU
Conditions
DataOut
Think of ALU as a number of other
arithmetic and logic blocks in a
single box! Function selects the block
Adder
Subtract …
AND

11. ALU Integrated Circuit
Integrated circuit – off-the-shelf components
Examine the functionality of this ALU chip
Performs 8 functions

12. Change the select code to 101 and repeat.
Example
Determine the 74HC382 ALU outputs for the following inputs: S2S1S0=010, A3A2A1A0=0100, B3B2B1B0=0001, and CN=1.
Function code indicates subtract
0100 – 0001 = 0011
Change the select code to 101 and repeat.
Function code indicates OR
0100 OR 0001 = 0101
Synchronize ALU
with a clock
DataA
DataB
Function
ALU
Conditions
DataOut

13. Expanding the ALU
Multi-bit ALU created by connecting carry output of low-order chip to carry in of high order
Eight-bit ALU formed from 2 four-bit ALUs

14. Datapath components Tri-state buffer Loadable register In Out
If Enable asserted,
Out = In
Otherwise
Out open-circuit
Enable
Clk
Load
Data stored on rising edge if Load is asserted (e.g. Load = 1)

15. Computation in a Typical Computer
Control logic often implemented as a finite state machine (including ROMs)
Datapath contains blocks such as ALUs, registers, tri- state buffers, and RAMs
In a processor chip often a 5 to 1 ratio of datapath to control logic
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

16. Consider the following computation steps
Using a Datapath
Consider the following computation steps
ADD A, B and put result in A
Subtract A, B and put result in B
OR A, B put result in A
Repeat starting from step 1
Determine values
for Function, LoadA, LoadB
Function A B
LoadB
LoadA
ALU
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

17. Modeling Control as a State Machine
Consider the following computation steps
ADD A, B and put result in A
Subtract A, B and put result in B
OR A, B put result in A
Repeat starting from step 1
Determine values
for Function, LoadA, LoadB
Model control as a state machine.
Determine control outputs for each state S0 S1 S2
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

18. Modeling Control as a State Machine
Consider the following computation steps
ADD A, B and put result in A
Subtract A, B and put result in B
OR A, B put result in A
Repeat starting from step 1
States
S0 = 00
S1 = 01
S2 = 10
Present State Next State Function LoadA LoadB
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.
We know how to implement this using an SOP.
Can we use a ROM?

19. ROM Implementation of State Machine
Present State Next State Function LoadA LoadB
States
S0 = 00
S1 = 01
S2 = 10 PS NS 00 01 10
ROM
Function, LoadA, LoadB
Note: No minimization!
One line in ROM for each state
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

20. Putting the Control and Datapath Together
ROM 00 01 10 PS NS
LoadA A B
LoadB
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.
ALU 3
Function

21. What if we replaced the ROM with RAM? 00
Looks like software! 01 10 PS NS
LoadA A B
LoadB
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.
ALU 3
Function
Possible to implement different functions!
Program the RAM to perform different sequences

22. ALU circuit can perform many functions
Summary
ALU circuit can perform many functions
Combinational circuit
ALU chips can be combined together to form larger ALU chips
Remember to connect carry out to carry in
ALUs form the basis of datapaths
ROMs can form the basis of control paths
Combine the two together to build a computing circuit
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

24. DLD Simulators
Circuit Maker 2000
MultiSim
Electronic Workbench

25. CircuitMaker Workspace

26. Connectivity
An important feature of CircuitMaker is the way electrical connections between the elements in your design are recognized.
The concept of connectivity is the key to using CircuitMaker to draw and simulate electronic circuits. The program stores connection information for simulation, and it is also used for creating and exporting netlists into TraxMaker or other pcb layout programs to create a working printed circuit board (PCB).
CircuitMaker sections :
Schematic Window
Analysis Window
Panel
Schematic window is where the schematics are drawn. One circuit file at a time can be opened into this window
Analysis Window is where the simulation results are
Panel has tabs across the top which are used to select controls which are relevant to the available displayed

27. Anatomy of a Schematic Drawing
Schematic, including device symbols, label-values and designations, wires, and pin dots

28. CktMaker Conventions
.CKT Schematic (or Circuit) files
.DAT Data files (Hotkeys; device library classifications)
.LIB Device library files
.MOD Model files
.SUB Subcircuit files
.SDF Waveform display setup files

29. CktMaker Toolbar

30. Drawing a Schematic
Using the Browse tab in the Panel
Selecting a transistor
Selecting resistors
Selecting a +V and ground device
Changing resistor and transistor label values
Wiring the circuit

31. Placing a Transistor
Begin the circuit by selecting the 2N2222A transistor [.General/BJTs/NPN Trans]. 1 Select .General / BJTs / NPN Trans:C in the Browse tree. Select the 2N2222A transistor in the Model list. 2 Click Place to select this device from the library. You can also click the Search tab on the Panel, type 2n2222a , and click Find to quickly find the part. 3 Position the transistor at about mid-screen and then click the left mouse button once.

32. Placing the Resistors
The next procedure involves placing two resistors. 1 Select a Resistor [Passive Components/Resistors/Resistor] (r) by pressing the r Hotkey on the keyboard. Notice that the resistor is oriented horizontally and moves around the screen with the mouse. 2 Press the r key again (or click the Right mouse button) to rotate the device 90°. 3 Drag the resistor above and to the left of the transistor and click the Left mouse button once to place it. This is resistor R1. Don’t worry about the value yet. 4 Place a second resistor directly above the transistor. This is resistor R2.

33. Placing +V and Ground Devices
Now you.’ll place a voltage source and change its settings.
Select a +V [.General/Sources/+V] (1) by pressing the 1 (number one) Hotkey. Place it above resistor R2.
Select a Ground [.General/Sources/Ground] (0) by pressing the 0 (zero) Hotkey. Place it below the transistor.
3 Double-click the +V device using the Left mouse button to open the Device Properties dialog box

34. Placing +V and Ground Devices
4 Change the Label-Value field to read +15V. 5 Click once on the topmost Visible check box. This causes the +V name to be hidden on the schematic. 6 Click once on the third Visible check box from the top. This causes the V1 designation to be hidden on the schematic. Click OK. Changing Resistor Label-Values 1 Double-click resistor R1. 2 Change the Label-Value field to read 220k, then click OK. 3 Double-click resistor R2. 4 Change the Label-Value field to read 870k, then click OK.

35. Wiring the Circuit Together
1 Select the Wire Tool from the Toolbar. 2 Place the cursor on the emitter pin of the transistor (the pin with the arrow.) When the cursor gets close to the pin, a small rectangle appears. 3 Click and hold the left mouse button, then drag the wire to the pin of the Ground symbol. 4 Release the mouse button to make the connection. 5 Place the cursor on the bottom pin of R2, and then click and hold the mouse button to start a new wire. 6 Drag the end of the wire to the collector pin of the transistor and release the mouse button. 7 Connect a wire from the top pin of R2 to +15V. 8 Connect another wire from the bottom pin of R1 to the base of the transistor. 9 Finally, connect a wire from the top pin of R1 to the middle of the wire which connects +15V to R2.

36. Digital Logic Simulation
1 Click the Open button in the Toolbar. 2 Select the SIM.CKT file from the list of available circuits. The SIM.CKT circuit contains several mini-circuits and is useful for demonstrating CircuitMaker.’s digital simulation features. 3 Click the Run button on the Toolbar to start simulation. You know that simulation is running when you see a Hex Display showing a count sequence. 4 Select the Probe Tool from the Toolbar and touch its tip to the wire just to the left of the label .“Probe Wire to the Left..” The letter L will be displayed in the Probe Tool. 5 Move the tip of the Probe Tool to the Logic Switch labeled .“Toggle Switch.” and click near its center. The Logic Display connected to the output of this minicircuit should then start to toggle on and off rapidly. 6 Click the Horizontal Split button on the Toolbar to open the digital Waveforms window. Each node in the circuit that has a SCOPE device attached is charted in this window. 7 Select Simulation > Active Probe, then run the simulation again. A new waveform called Probe displays in the Waveforms window. Watch what happens to this waveform as you move the Probe Tool around the circuit. 8 Click the Trace button in the Toolbar to see the state of every wire in the circuit as the state changes. A red wire indicates a high state, a blue wire indicates a low state. 9 Click the Pause button in the Toolbar to stop simulation.

37. Demo with examples