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Thapliyal 1MAPLD 2005/1012 A Beginning in the Reversible Logic Synthesis of Sequential Circuits Himanshu Thapliyal and M.B Srinivas

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Presentation on theme: "Thapliyal 1MAPLD 2005/1012 A Beginning in the Reversible Logic Synthesis of Sequential Circuits Himanshu Thapliyal and M.B Srinivas"— Presentation transcript:

1 Thapliyal 1MAPLD 2005/1012 A Beginning in the Reversible Logic Synthesis of Sequential Circuits Himanshu Thapliyal and M.B Srinivas (thapliyalhimanshu@yahoo.com, srinivas@iiit.net) Center for VLSI and Embedded System Technologies International Institute of Information Technology Hyderabad-500019, India Mark Zwolinski (mz@ecs.soton.ac.uk) Electronic System Design Group Electronics & Computer Science University of Southampton,U.K

2 Thapliyal 2MAPLD 2005/1012 Abstract This work presents Reversible Flip Flops useful in designing reversible sequential Circuits. Reversible circuits form the basic building blocks of quantum computers, as all quantum operations are reversible. Reversible gates used for reversible logic synthesis are New Gate, Feynman Gate, and Fredkin gate Novelty of the paper is the reversible logic synthesis of Flip Flops The Flip Flops that are synthesized using reversible logic are: RS Flip Flop, JK Flip Flop, D Flip Flop, T Flip Flop and Master Slave Flip Flop To the best of our knowledge and the survey of literature, this is the first work in this area.

3 Thapliyal 3MAPLD 2005/1012 Introduction Reversible logic Reversible circuits are those circuits that do not lose information. Reversible circuits can generate a unique output vector from each input vector, and vice versa. In reversible circuits, there is a one-to-one mapping between input and output vectors.

4 Thapliyal 4MAPLD 2005/1012 Motivation behind reversible logic Landauer has shown that for irreversible logic computations, each bit of information lost, generates kTlog2 joules of heat Bennett showed that kTln2 energy dissipation would not occur, if a computation were carried out in a reversible way Whenever a logic operation is performed, the computer erases information. All these logic operations are irreversible dissipating a lot of heat. The current irreversible technologies will dissipate a lot of heat and can reduce the life of the circuit. As Moore’s law continues to hold, processing power doubles every 18 months. Reversible logic operations do not erase (lose) information and dissipate much less heat. Reversible logic is likely to be in demand in high speed power aware circuits. Reversible circuits are of high interest in low-power CMOS design, optical computing, nanotechnology and quantum computing.

5 Thapliyal 5MAPLD 2005/1012 Application of Reversible Logic In Quantum Computing Prominent application of reversible logic lies in quantum computers. Quantum gates perform an elementary unitary operation on one, two or more two–state quantum systems called qubits. Any unitary operation is reversible and hence quantum networks also. Quantum networks effecting elementary arithmetic operations cannot be directly deduced from their classical Boolean counterparts (classical logic gates such as AND or OR are clearly irreversible). Thus, Quantum computers must be built from reversible logical components

6 Thapliyal 6MAPLD 2005/1012 BASIC REVERSIBLE GATES FREDKIN GATE: a (3*3) conservative reversible gate originally introduced by Petri The input triple (x1,x2,x3 ) associates with its output triple (y1, y2,y3) as follows NEW GATE: New Gate (NG) is a 3*3 one-through reversible gate The input triple (A,B,C) associates with its output triple(P,Q,R) as follows. P=A Q=ABC R=A'C'  B' FEYNMAN GATE (FG): Feynman gate is a 2*2 one-through reversible gate The input double(x1,x2 ) associates with its output double (y1,y2) as follows. y1=x1 y2=x1  x2

7 Thapliyal 7MAPLD 2005/1012 Novel Design of Reversible Flip Flops A novel attempt is made to design Sequential circuits using Reversible logic. According to the survey of literature and to the best of our knowledge, this is the first work in this area. In order to initiate the process of reversible logic synthesis of sequential circuits, Flip-Flops are designed using Reversible logic. The Flip Flops that are synthesized using reversible logic are RS Flip Flop, JK Flip Flop, D Flip Flop, T Flip Flop and Master Slave Flip Flop

8 Thapliyal 8MAPLD 2005/1012 Reversible Eqvivalent Gates Used for Designing Sequential Circuits Fredkin Gate As AND Gate New Gate As NAND GateNew Gate As NOR Gate Feynman Gate As Copying Output Feynman Gate As Not Gate

9 Thapliyal 9MAPLD 2005/1012 RS Flip Flop No of gatesGarbage Outputs Proposed Circuit 68 Existing One None in literature None in Literature Conventional RS Flip Flop Proposed Reversible RS Flip Flop Evaluation of the Proposed RS Flip Flop

10 Thapliyal 10MAPLD 2005/1012 D Flip Flop Conventional DFlip Flop Proposed Reversible D Flip Flop No of gatesGarbage Outputs Proposed Circuit 78 Existing OneNone in literature None in Literature Evaluation of the Proposed D Flip Flop

11 Thapliyal 11MAPLD 2005/1012 JK Flip Flop Conventional JK Flip Flop Proposed Reversible JK Flip Flop No of gatesGarbage Outputs Proposed Circuit1012 Existing OneNone in literature None in Literature Evaluation of the Proposed JK Flip Flop

12 Thapliyal 12MAPLD 2005/1012 T Flip Flop Conventional T Flip Flop Proposed Reversible T Flip Flop No of gates Garbage Outputs Proposed Circuit 1012 Existing One None in literature None in Literature Evaluation of the Proposed T Flip Flop

13 Thapliyal 13MAPLD 2005/1012 Master Slave JK Flip Flop Conventional Master Slave JK Flip Flop Proposed Reversible Master Slave JK Flip Flop No of gates Garbage Outputs Proposed Circuit 1821 Existing One None in literature None in Literature Evaluation of the Proposed Flip Flop

14 Thapliyal 14MAPLD 2005/1012 Results and Discussion Novel Reversible Flip Flops are designed Using Feynman Gate, New gate and Fredkin Gate. The designed FFs are highly optimized in terms of number of reversible gates and Garbage outputs. Modularization approach has been used to design the reversible Flip Flops. Fan out problem is avoided by using Feynman gate for copying the output.

15 Thapliyal 15MAPLD 2005/1012 Work In Progress Coming out with a new reversible gate specially designed for performing sequential operations. Designing of Complex Sequential circuits using the proposed designs. Future Work Building of the proposed Reversible Flip Flops by using technologies such as a. CMOS, in particular adiabatic CMOS b. Optical, thermodynamic technology c. Nanotechnology & DNA technology. Introducing online testability feature in Reversible designs of Sequential circuits

16 Thapliyal 16MAPLD 2005/1012 References R. Landauer, “Irreversibility and Heat Generation in the Computational Process”, IBM Journal of Research and Development, 5, pp. 183-191, 1961. C.H. Bennett, “Logical Reversibility of Computation”, IBM J. Research and Development, pp. 525-532, November 1973. E. Fredkin, T Toffoli, “Conservative Logic”, International Journal of Theor. Physics, 21(1982),pp.219- 253. T. Toffoli., “Reversible Computing”, Tech memo MIT/LCS/TM-151, MIT Lab for Computer Science (1980). Alberto LEPORATI, Claudio ZANDRON, Giancarlo MAURI," Simulating the Fredkin Gate with Energy{Based P Systems", Journal of Universal Computer Science,Volume 10,Issue 5,pp 600-619. Md. M. H Azad Khan, “Design of Full-adder With Reversible Gates”, International Conference on Computer and Information Technology, Dhaka, Bangladesh, 2002, pp. 515-519. Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Syed Mostahed Ali Chowdhury and Ahsan Raja Chowdhury,“Reversible Logic Synthesis for Minimization of Full Adder Circuit”, Proceedings of the EuroMicro Symposium on Digital System Design(DSD’03), 3-5 September 2003, Belek- Antalya, Turkey,pp-50- 54. Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Syed Mostahed Ali Chowdhury and Ahsan Raja Chowdhury," Synthesis of Full-Adder Circuit Using Reversible Logic",Proceedings 17th International Conference on VLSI Design (VLSI Design 2004), January 2004, Mumbai, India,pp-757-760. J.W. Bruce, M.A. Thornton,L. Shivakumariah,P.S. Kokate and X.Li, "Efficient Adder Circuits Based on a Conservative Logic Gate", Proceedings of the IEEE Computer Society Annual Symposium on VLSI(ISVLSI'02),April 2002, Pittsburgh, PA, USA, pp 83-88.

17 Thapliyal 17MAPLD 2005/1012 References Continued G Schrom, “Ultra Low Power CMOS Technology”, PhD Thesis, Technischen Universitat Wien, June 1998. E. Knil, R. Laflamme, and G.J Milburn, “ A Scheme for Efficient Quantum Computation With Linear Optics”, Nature, pp 46-52, Jan 2001. M. Nielsen and I. Chaung, “Quantum Computation and Quantum Information”, Cambridge University Press, 2000. R.C. Merkle, “Two Types of Mechanical Reversible Logic”, Nanotechnology,4:114-131,1993. Vlatko Vedral, Adriano Bareno and Artur Ekert, “ Quantum Networks for Elementary Arithmetic Operations”, arXiv:quant-ph/9511018 v1, nov 1995. Hafiz Md. Hasan Babu and Ahsan Raja Chowdhury, "Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder”, 18th International Conference on VLSI Design (VLSI Design 2005), January 2005, Kolkata, India,pp-255-260. Kai Wen Chung and Chien-Cheng Tseng, “Quantum Plain and Carry Look Ahead Adders”, arxiv.org/abs/quant-ph/0206028. Himanshu Thapliyal, M.B Srinivas and Hamid R. Arabnia, "A Need of Quantum Computing: Reversible Logic Synthesis of Parallel Binary Adder-Subtractor", The 2005 International Conference on Embedded System and Applications(ESA'05), Las Vegas, U.S.A, June 2005. Himanshu Thapliyal, M.B Srinivas and Hamid R. Arabnia, " A Reversible Version of 4 x 4 Bit Array Multiplier With Minimum Gates and Garbage Outputs ", The 2005 International Conference on Embedded System and Applications(ESA'05), Las Vegas, U.S.A, June 2005. Himanshu Thapliyal, M.B Srinivas and Hamid R. Arabnia, "Reversible Logic Synthesis of Half, Full and Parallel Subtractors ", The 2005 International Conference on Embedded System and Applications (ESA'05), Las Vegas, U.S.A, June 2005.


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