1. Logic and data representation Revision

2. AND gate A B A B All inputs have to be true ( i.e 1) for the output of the gate to be high, in all other cases the output is false.

3. OR gate A B A B If any of the inputs are true then the output is true

4. A _ A _ A NOT gate The output of a NOT gate is the opposite of the input, in other words the gate inverts the input, so is often called an inverter.

5. NAND gate The opposite of an AND gate when any of the inputs are false the output is true Equivalent to A B A B

6. A B A B Equivalent to The opposite of the OR gate, the gate is only true when none of the inputs are true. NOR gate

7. A B Exclusive OR (XOR) In a 2-input the gate is only true when the inputs are different.

8. Boolean Algebra

9. Combining gates

10. Truth table for previous slide ABCDEF 001111 011001 100101 110000

11. Truth table to logic diagram ABCDEFG 0011000 0110101 1001011 1100000

12. Looking at the truth table on the previous slide Output G is only true when the inputs A is false and B is true, or A is true and B is false The output for an AND gate is only true when both the inputs are true, so if we build a circuit that when the combinations of inputs A is false and B is true, or A is true and B is false we get an true output we have built a circuit to do this logic operation.

13. A is false and B is true So if we can find a way to make the output from AND be true for this combination – part of the answer. There is no problem with B this is true. A is false so we need to pass it through a device that we A is false the output is true – NOT gate.

14. We can do a similar operation for when A is true and B is false We also need a way of combining these two parts together so if either combination occurs we get an true (1) output. OR gate

15. Combining gates

16. R-S Flip-Flop/Latch

17. For a R-S flip-flop based around the NOR gate. RSQ(t+1) 000- stays same (e.g. if 1 to starts then stays as 1) 011-Q is set to 1 100-Q is reset 11X-indeterminate

18. Where Q(t) is the current value (or state) of the output Q and Q(t+1) is the state of Q that will be produce. X is indeterminate (due to the outputs dependent on which gate changes first)

19. D-type Data (D) only appears at the output Q on a clock pulse. So if D=1 on a clock pulse, R=0,S=1 and Q=1. So if D=0 on a clock pulse R=1,S=0 and Q=0. Otherwise Q stays the same.

20. Shift Register A 4-bit shift register

21. Shift Register Each time the flip-flop are clocked ( goes positive then negative), the value at the input to the flip-flop is passed to its output. The effect is that a sequence at the input to the circuit is passed from the input to the output of the circuit one bit at a time.

22. J-K Flip-Flop Three inputs - J,K,and clock This is a master-slave arrangement, the inputs are isolated from the outputs by the second latch, which does not change until after the master has ‘latched’.

23. J-K Flip-Flop JK Q(t)Comment 00QThe output Q stays the same. 010Reset (Q=0) 101Set (Q=1) 111Toggle Two ways to get no change on output: Clock turned off J and K both 0

24. Numbering Systems (Binary) The two-state nature of logic gates means the use of 0 or 1, as the basic unit of the count is natural. Data is represented by binary digits (bits), words are groups of bits, but by convention the size of words are multiples of 8 bits (or a byte). bit furthest right as the least significant bit (lsb) and bit furthest left as the most significant bit as the most significant bit (msb).

25. Decimalmsb Lsb 1286432168421 25511111111 800001000 3300100001 9901100011 4600101110

26. Numbering system (Hexadecimal) A base-16 system with 16 possible digits {0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F}. Each hexadecimal number can be represented by 4 bits.

27. HexadecimalBinaryDecimal 000000 100011 200102 300113 401004 501015 601106 701117 810008 910019 A101010 B101111 C110012 D110113 E111014 F111115

28. Negative and Positive Numbers So far is the discussion no mention has been made about the being able to represent negative numbers, how can both negative and positive number be stored.

29. 2’s complement There is an alternative, which allows addition and subtraction to be treated in the same way. 2’s complement has the ‘sign’ of the number built in. This achieved by the most significant bit the value –2 n-1 having a negative value so if n=8 this is –128 and the rest of the bits are unsigned bits.

30. 2’s complement If 10000001 was stored the msb =-128 and the rest equals 1 so the number is –128+1=-127. If 00000001 was stored the msb =0 and the rest equals 1 so the number this time is 0+1=1

31. -12810000000 -12710000001 -12610000010 ::::::::: -311111101 -211111110 11111111 000000000 +100000001 +200000010 +300000011 :::::::: +12401111100 +12501111101 +12601111110 +12701111111

32. So if 2’s complement we can represent numbers between –128 and +127, in all that is involved is adding two numbers together. -126 =10000010 +126 = 01111110 If we reverse all the bits in –126 we get01111101 if we add to this we get 01111110

33. Starting Number = -12610000010 Reverse bits01111101 Add 101111110 +12601111110 Positive to negative and back

34. For example 1010 + 0011 _____ =1101 1 ^ Carry __|

35. Binary subtraction Binary subtraction is performed by converting the second number into it’s two’s complement and adding. So there is not a need for a subtracting circuit. As an example: 14-6

36. Subtraction Example Number A=1400001110 Number B=600000110 Reverse bits in Number B11111001 +111111010 B 2’s Complement = C11111010 1400001110 2’s Complement of 611111010 add 800001000

37. 421½¼1/81/16 1011010

38. Floating-point numbers Often we want to represent very small, very large numbers or numbers with fractional parts. For example,33550000 or 0.00000001451. One way of doing this is scientific notation where these numbers are split into two parts a number with a decimal point within it (called the mantissa) and a power of 10 (called the exponent).

39. Fixed NotationScientific NotationMantissaExponent 335500000.3355x10 8 0.33558 0.000000014510.1451x10 -7 0.1451-7

40. The decimal number 5.625 could be represented as 101.101. If we use this mantissa and exponent idea, it could also be written as 1.01101x2 2 (Normalised) where the exponent shows the final position of the binary point relative to the current position. Because the binary point can be altered depending on the magnitude of the exponent, it often refereed to as a floating-point representation.

41. IEEE standard (single precision) SignExponentMantissa Bit 31Bits 23-30Bits 0-22 -ve131 10 0.265625 10 11000001001000100000000000000000

42. Features with floating point representation Gives a wide range of numbers It is not precise Precision and Range can be improved using more bits (64 bits in Double precision) – Bit 63 for sign, – bits 52-62 for exponent – Bits 0 to 51 for mantissa

43. ASCII Most common text representation. Each character has a code. Special characters such as space, return, etc have codes. American Standards Code for Information Interchange. Alternatives: EBCDIC not widely used.

44. ASCII 01234567 0NULDCL0@P‘p 1SOHDC1!1AQaq 2STXDC2“2BRbr 3ETXDC3#3CScs 4EOTDC4$4DTdt 5ENQNAK%5EUeu 6ACKSYN&6FVfv 7BELETB‘7GWgw 8BSCAN(8HXhx 9HTEM)9IYiy ALFSUB*:JZjz BVTESC+;K[k{ CFFFS, N^n~ FSIUS/?O_oDEL

45. Unicode ASCII used 7 bits (often the 8 th bit used to help check the data was transferred correctly). Therefore, limited a small character set. Unicode is a 16-bit system, and can deal with the requirements of the modern system, with the need for different character sets for different languages.

46. ASCII So what is the code for A? Go to the table and find A it is on the column marked 4 and row marked 1. This can be used to give a hexadecimal number – Column gives the higher hexadecimal number. – Row gives the low hexadecimal number. There A is 41 16 What is this code as a decimal number? 41 10 or 65 10 ?

47. Test yourself! Go to URL: http://library.northampton.ac.uk/exams/index.php?sterm=csy1014 &stage=all&year=all Download summer exam papers for 2004 and 2005 (ones ending in N) – From 2004 paper do Q1,Q5 a,b,d – From 2005 paper do Q2a,c,d; Q5