1. Mark Raymond - m.raymond@imperial.ac.uk - 17/10/051 Trip-t testing brief status report test setup description - hardware and software some very early results - scope pictures – too early to draw firm conclusions

2. Mark Raymond - m.raymond@imperial.ac.uk - 17/10/052 Test set-up Trip-t Programmable Digital Pattern Generator ~12 control lines preamp int./reset pipeline, multiplexer, programming Qinj ADC Scope LabVIEW VME ck and trig. level shift dECL -> 2.5V CMOS

3. Mark Raymond - m.raymond@imperial.ac.uk - 17/10/053 Photos Trip-t (1 st version) charge injection split between 2 adjacent channels 2.5 V CMOS control lines

4. Mark Raymond - m.raymond@imperial.ac.uk - 17/10/054 Photos Trip-t board dECL -> 2.5 V CMOS level shift digital pattern generator dECL outputs ADC

5. Mark Raymond - m.raymond@imperial.ac.uk - 17/10/055 Test software LabVIEW VI allows to generate, edit & load pattern generator with bit streams to program and run trip-t output patterns (i.e. pulse widths) variable with 25 ns resolution software not polished but in working state – can program and run chip, and inject test pulses window showing trip-t programming data to be serially clocked in window showing pipeline clock signal - 1’s and 0’s clocked out serially (at 40 MHz) trip-t on-chip register values to program

6. Mark Raymond - m.raymond@imperial.ac.uk - 17/10/056 output pictures 4p7 47p signal from pattern generator split between 2 trip-t inputs A-pulse output 47pF channel Qin=0.124 pC 4.7pF channel Qin=0.012 pC trip-t parameters set to default values trip-t Acquisition sequence: 1) set PreReset and PipeClocks running 2) inject signal during preamp integrate period 3) wait for programmed pipeline depth to elapse (default 31) 4) send trigger to chip (SKIPB) 5) run the output MUX

7. Mark Raymond - m.raymond@imperial.ac.uk - 17/10/057 output pictures – A and t pulses A-pulse t-pulse blue = 0.124 pC on 47 pF chan. t-pulse generated for this channel only green = 0.385 pC on 47 pF chan. t-pulse generated for this channel only amplitude slightly bigger orange = 1.24 pC on 47 pF chan. t-pulse generated for both channels because low 4.7 pF channel now getting 0.124 pC 0.124 pC on 47 pF channel 0.012 pC on 4.7 pF channel CAUTION: these are VERY early results – don’t draw firm conclusions – things will likely change

8. Mark Raymond - m.raymond@imperial.ac.uk - 17/10/058 output pictures – discriminator output charge injection signal Preamp Resetintegratereset Pipeline Clock Qin = 0.124 pC Qin = 0.385 pC Qin = 1.24 pC discriminator output for 47 pF channel region expanded on next page For these results the discriminator outputs were permanently enabled  signal appears immediately (don’t have to read out during preamp reset period) digital signals not very clean – need to improve in test setup CAUTION: these are VERY early results – don’t draw firm conclusions – things will likely change

9. Mark Raymond - m.raymond@imperial.ac.uk - 17/10/059 charge injection signal Preamp Reset Pipeline Clock Qin = 0.124 pC Qin = 0.385 pC Qin = 1.24 pC discriminator output for 47 pF channel discriminator output timewalk ~ dominated by charge injection risetime CAUTION: these are VERY early results – don’t draw firm conclusions – things will likely change output pictures – discriminator output

10. Mark Raymond - m.raymond@imperial.ac.uk - 17/10/0510 current status and things to do main effort so far on assembling test setup and basic software test setup hardware in place, basic software to program and run chip exists some improvements desirable (e.g. improve digital signals) need to integrate VME ADC – mainly software effort (day or two’s work) can then begin more systematic investigation of chip performance things to look at chip performance with test pulses gain, linearity, time resolution, noise … get deeper understanding of functionality and characteristics investigate effect of changing bias register parameters performance with SiPMs verify feasibility of 2 different gains/SiPM LED pulses and scintillator signals lots to do – need to prioritise