1. PEDS: Parallel Error Detection Scheme for TCAM Devices David Hay, Politecnico di Torino Joint work with Anat Bremler Barr (IDC, Israel), Danny Hendler (BGU, Israel) and Ron Roth (Technion, Israel) Supported by a Cisco grant 20/6/2008

2. Bottlenecks in Packet Switching Packet Classification Switching Packet Scheduling

3. Packet Classification w/ TCAM Encoder Match lines Packet Header 0 1 2 3 4 6 5 7 8 9 2 0 1 2 3 4 6 5 7 8 9 accept deny accept TCAM Array Each entry represents a rule and is a word in {0,1,*} W

4. TCAM Dimensions 100,000-200,000 rules (rows) Each entry is 100-150 ternary symbols (column) This leaves few dozens (~36) extra symbols in each entry, that can be used to optimize TCAM performance

5. TCAM-Related Challenges How to efficiently represent rules with range fields? E.g., all packets with dest-port [1,6] or [1024,2 16 -1] are accepted, all other are denied. One possibility: prefix expansion. Use multiple entries to code a single rule. [1,6]= {001, 01*,10*, 110} Causes 16% more entries in real TCAMs. Better solution: use the extra symbols to code ranges. Reduces dramatically the number of additional entries required. [Bremler-Barr, Hay, Hendler and Farber, SIGMETRICS 2008] This talk: Error Correction codes for TCAM. [Bremler-Barr, Hay, Hendler and Roth]

6. Types of TCAM Errors False Miss False Hit Indirect False Hit 1 1 0 * 1 * 1 * 1 1 0 1 1 1 0 * 1 * 1 * 1 1 0 1 1 0 1 2 0 1 2 1 1 0 0 0 No Match

7. Types of TCAM Errors False Miss False Hit Indirect False Hit 1 1 0 * 1 * 1 * 1 1 0 1 1 1 0 * 1 * 1 * 1 1 0 1 1 0 1 2 0 1 2 1 1 10

8. Types of TCAM Errors False Miss False Hit Indirect False Hit 1 1 0 * 1 * 1 * 1 1 0 1 1 1 0 * 1 * 1 * 1 1 0 1 1 0 1 2 0 1 2 1 1 0 1 02

9. TCAM Errors vs. SRAM Errors In SRAM (or any regular memory) Input: address (entry number) Output: content of that address One can apply an error detection/correcting code on that content In TCAM Even if the content seems OK, we still have false miss or indirect false miss errors  TCAM EDC/ECC are harder: we prove that on-the-fly error correcting is impossible, and that hardware change is needed for error detection

10. PEDS We add one or more check symbols to each entry as error detection code In most TCAM configuration, extra-bits are available anyway With the TCAM parallel lookup we provide a generic scheme with tradeoff points between: 1. Resilience 2. Number of extra-bits 3. Time till all errors are detected 4. Hardware changes Most tradeoff points can be set after deployment Always Depends on the entry width and not number of entries

11. Toy Example For each entry, duplicate each symbol 0*10  00**1100 → The entry is correct iff each pair has the equal symbols: 00, 11 or **. Applying two lookups for the first pair: 01****** 10****** If 00, 11 – none of the lookups match. If **, both lookups match If 01, 0*, *1 – only first lookup matches If 10, 1*, *0 – only second lookup matches Repeat for all other pairs. Even number of Matches Odd number of Matches

12. Hardware Change Encoder One XOR gate + One single-bit register per match lines (+control lines) Each register will save the result of the previous match and XOR it with the result of the current match. This will enable us to determine if we got even or odd number of matches.

13. One Generalization One check symbol for each k symbols (a.k.a. k-clause) Previous toy example: k=1 Total Space: W/k extra bits. Resilience*: W/k k

14. Determining Check Symbols Treat the symbols as element over GF(3) “1”↔ +1 “0”↔ -1 “*” ↔ 0 Each k-clause is just a vector over GF(3) k Add parity check symbol x for any k-clause, that is where w i is the i-th symbol of the clause “*” has a special semantic and so does 0

15. Determining Lookup Set Set of lookup keys C: set of all vectors GF(2) k+1,, such that the sum of all their elements is either +1 or -1 GF(2)={-1,+1}, no ‘*’s, Main Theorem - even-correct/odd-wrong property: The number of keys in C that matches a clause i is even if and only if clause i is correct Proof by induction... Can be further generalized to any linear [n,k,d] code This is the linear [n=k+1, k,2] code (Much) more sophisticated lookup keys derivation, using the parity-check matrix of the code 

16. PEDS Performance Total Space: W/k extra bits. Resilience * : W/k #keys for k symbols ~ 2 k+2 /3 #lookups ~ W[2 k+2 /(3k)] K# keys# lookups (W=100) # extra bits (W=100) 12200100 2525050 31136734 42255025 54386020 685141717 7170242915

17. Pushing the counters out k Suppose that only one error can occur in the same clause of each M lines M (log M)/2 XOR gates (log M)/M registers per entry on average

18. Pushing the counters out k M 0 0 0 0 1 0 0 001 010 011 100 101 110 111 011 unit vector v (specific) parity check matrix H Syndrome of v: s=Hv Problem: even if we assume one error, we don’t have a unit vector!

19. Pushing the counters out Added hardware  multiple a matrix H with a vector v. returns the right syndrome only if v is a unit vector We have one vector for each lookup key v 1, v 2,…v n  we compute Hv 1  Hv 2  …  Hv n By even-correct/odd-wrong and the single error assumption: v=v 1  v 2  …  v n is a unit vector with 1 in the erroneous entry  Hv 1  Hv 2  …  Hv n = H (v 1  v 2  …  v n ) =H·v = s is the right syndrome! Right result in the end, meaningless values in the middle

20. Wrap-up Detecting all errors using the built-in parallel lookup of the TCAM The number of lookups is a function of W, the width of the TCAM word, and not the number of entries in the database. Requires a hardware change, but only in the peripheral circuitry of the TCAM chip More generalizations and constructions in the paper… Using other codes Using 3-mod counter to reduce time (=hardware-time tradeoff) 

21. Thank You

23. Using other codes - Preliminaries (Ternary) linear code [n,k,d] is a set of 3 k vectors of length n over GF(3) that: forms a linear space over GF(3) have minimum Hamming distance d encodes words in GF(3) k to words in GF(3) n Each linear code has a parity check matrix H The linear code C is H’s right kernel: C= {v  GF(3) n | Hv T =0} If the rows of H are h 1,h 2,...,h r this is equivalent to: v is error free if and only if for each i, h i v T =0

24. Using other codes – TCAM definition The support of a vector is the set of indices in which it has no ‘0’. (  no ‘*’) Two vectors match if they have the same value in their joint support u j =v j for every j  J(u)  J(v) J(u) is the support of u

25. Determining set of search keys s(h;b) = {u  GF(3) n |J(u)=J(v) and hu T =b} Same non-’*’ coordinates, scalar product b If h has hamming weight w then: 1. |s(h;0)| = 2/3(2 w-1 +(-1) w ) 2. |s(h;  1)| = 1/3(2 w -(-1) w ) L(h) = s(h;+1)  s(h;-1) For h,v  GF(3) n where h  0: hv T =0 iff the number of vectors in L(h) that matches v is even  L = L(h 1 )  L(h 2 )  …  L(h r ) where h i is the i-th row of the parity check matrix of the code. Odd number Even number