1. B. Alizadeh Advanced Logic Design (2008) 1 / 55 Decision Diagrams

2. B. Alizadeh Advanced Logic Design (2008) 2 / 55 Binary Decision Diagrams Classical representation of logic functions: Truth Table, Karnaugh Maps, Sum- of- Products, critical complexes, etc. Critical drawbacks: - May not be a canonical form or is too large (exponential) for “useful” functions. Equivalence and tautology checking is hard - Operations like complementation may yield a representation of exponential size

3. B. Alizadeh Advanced Logic Design (2008) 3 / 55 Binary Decision Diagrams Reduced Ordered Binary Decision Diagrams (ROBDDs) A canonical form for Boolean functions Often substantially more compact than traditional normal forms Can be efficiently manipulated Introduced mainly by R. E. Bryant (1986). Various extensions exist that can be adapted to the situation at hand (e. g., the type of circuit to be verified)

4. B. Alizadeh Advanced Logic Design (2008) 4 / 55 Binary Decision Trees A Binary decision Tree (BDT) is a rooted, directed graph with terminal and nonterminal vertices Each nonterminal vertex v is labeled by a variable var( v) and has two successors: - low( v) corresponds to the case where the variable v is assigned 0 - high( v) corresponds to the case where the variable v is assigned 1 Each terminal vertex v is labeled by value( v)  {0, 1}

5. B. Alizadeh Advanced Logic Design (2008) 5 / 55 Binary Decision Trees Example: BDT for a two- bit comparator, f( a1,a2,b1,b2 ) = (a1  b1 )  (a2  b2 )

6. B. Alizadeh Advanced Logic Design (2008) 6 / 55 Binary Decision Trees We can decide if a truth assignment x = (x 1,..., x n ) satisfies a formula in BDT in linear time in the number of variables by traversing the tree from the root to a terminal vertex: - If var( v)  x is 0, the next vertex on the path is low( v) - If var( v)  x is 1, the next vertex on the path is high( v) - If v is a terminal vertex then f( x ) = f v (x1,..., xn ) = value( v) - If v is a nonterminal vertex with var( v)= xi, then the structure of the tree is obtained by Shanon’s expansion f v (x1,..., xn ) =  xi  f low(v) (x 1,..., x n )]  [xi  f high(v) (x1,..., xn )] For the comparator, (a1  1, a2  0, b1  1, b2  1) leads to a terminal vertex labeled by 0, i. e., f( 1, 0, 1, 1) = 0 Binary decision trees are redundant: - In the comparator, there are 6 subtrees with roots labeled by b2, but not all are distinct Merge isomorphic subtrees: - Results in a directed acyclic graph (DAG), a binary decision diagram (BDD)

7. B. Alizadeh Advanced Logic Design (2008) 7 / 55 (Canonical Form Property)Reduced Ordered BDD two Boolean functions are logically equivalent iff they have isomorphic representations This simplifies checking equivalence of two formulas and deciding if a formula is satisfiable Two BDDs are isomorphic if there exists a correspondence between the graphs such that - Terminals are mapped to terminals and nonterminals are mapped to nonterminals - For every terminal vertex v there exists a terminal vertex v’, value( v) = value( v’), and - For every nonterminal vertex v there exists a terminal vertex v’ : var( v) = var( v’), low( v) = low( v’), and high(v) = high(v’) Bryant (1986) showed that BDDs are a canonical representation for Boolean functions under two restrictions: (1) the variables appear in the same order along each path from the root to a terminal (2) there are no isomorphic subtrees or redundant vertices  Reduced Ordered Binary Decision Diagrams (ROBDDs)

8. B. Alizadeh Advanced Logic Design (2008) 8 / 55 Canonical Form Property Requirement (1): Apply total order “<” on the variables in the formula: if vertex u has a nonterminal successor v, then var( u) < var( v) Requirement (2): repeatedly apply three transformation rules 1. Remove duplicate terminals: eliminate all but one terminal vertex with a given label and redirect all arcs to the eliminated vertices to the remaining one

9. B. Alizadeh Advanced Logic Design (2008) 9 / 55 Canonical Form Property 2. Remove duplicate nonterminals: if nonterminals u and v have var( u) = var( v), low( u) = low( v) and high( u) = high( v), eliminate one of the two vertices and redirect all incoming arcs to the other vertex 3. Remove redundant tests: if nonterminal vertex v has low( v) = high( v), eliminate v and redirect all incoming arcs to low( v)

10. B. Alizadeh Advanced Logic Design (2008) 10 / 55 Canonical Form Property A canonical form is obtained by applying the transformation rules until no further application is possible Applications: -checking equivalence : verify isomorphism between ROBDDs -non- satisfiability : verify if ROBDD has only one terminal node, labeled by 0 -tautology : verify if ROBDD has only one terminal node, labeled by 1 Example: ROBDD of 2- bit Comparator with variable order a1 < b1 < a2 < b2 :

11. B. Alizadeh Advanced Logic Design (2008) 11 / 55 Variable Ordering Problem The size of an ROBDD depends critically on the variable order For order a 1 < a 2 < b 1 < b 2, the comparator ROBDD becomes: For an n- bit comparator: a1 < b1 <... < an < bn gives 3n + 2 vertices (linear complexity) a1 <... < an < b1... < bn, gives 3*2 n  1 vertices (exponential complexity!)

12. B. Alizadeh Advanced Logic Design (2008) 12 / 55 Variable Ordering Problem The problem of finding the optimal variable order is NP- complete Some Boolean functions have exponential size ROBDDs for any order (e. g., multiplier) Heuristics for Variable Ordering Heuristics developed for finding a good variable order (if it exists) ROBDDs tend to be smaller when related variables are close together in the order (e. g., ripple- carry adder) Variables appearing in a subcircuit are related: they determine the subcircuit’s output  should usually be close together in the order Dynamic Variable Ordering Useful if no obvious static ordering heuristic applies During verification operations (e. g., reachability analysis) functions change, hence initial order is not good later Good ROBDD packages periodically internally reorder variables to reduce ROBDD size Basic approach based on neighboring variable exchange... < a < b <... ...< b < a <...

13. B. Alizadeh Advanced Logic Design (2008) 13 / 55 Logic Operations on ROBDDs Residual function (cofactor): b  {0, 1} f (x 1,..., x n ) |x i  b = f( x 1,..., x i-1, b, x i+1,..., x n ) ROBDD of f |x i  b computed by a depth- first traversal of the ROBDD of f: (1) For any vertex v which has a pointer to a vertex w such that var( w) = x i, replace the pointer by low(w) if b is 0 and by high(w) if b is 1. (2) If not in canonical form, apply Reduce to obtain ROBDD of f |x i  b. All 16 two- argument logic operations on Boolean function implemented efficiently on ROBDDs in linear time in the size of the argument ROBDDs.

14. B. Alizadeh Advanced Logic Design (2008) 14 / 55 Logic Operations on ROBDDs Based on Shannon’s expansion f = [  x  f |x  ]  [x  f |x  ] Bryant (1986) gave a uniform algorithm, Apply, for computing all 16 operations: f * f’ : an arbitrary logic operation on Boolean functions f and f’ v and v’: the roots of the ROBDDs for f and f’, x = var( v) and x’ = var( v’) Consider several cases depending on v and v’ (1) v and v’ are both terminal vertices: f * f’ = value( v) * value( v’) (2) x = x’ : use Shannon’s expansion f * f’= [  x  (f |x  * f’ |x  )]  x  (f |x  * f’ |x  )] to break the problem into two sub-problems, each is solved recursively The root is v with var( v) = x Low( v) is (f| x  0 * f’| x  0 ) High( v) is (f| x  1 * f’| x  1 )

15. B. Alizadeh Advanced Logic Design (2008) 15 / 55 Logic Operations on ROBDDs (3) x < x’ : f’| x  0 = f’| x  1 = f’ since f’ does not depend on x In this case the Shannon’s expansion simplifies to f * f’= [  x  (f| x  0 * f’)]  x  (f | x  1 * f’)], similar to (2) and compute subproblems recursively, (4) x’ < x : similar to the case above Improvement using the if- then- else (ITE) operator: ITE( F, G, H) = F. G + F’. H where F, G and H are functions Recursive algorithm based on the following, v is the top variable (lowest index): ITE( F, G, H) = v.( F. G + F’. H) v + v’.( F. G + F’. H) v’ = v.( F v.G v + F’ v.H v ) + v’.( F v’.G v’ + F’ v’.H v’ ) = (v, ITE( F v, G v, H v ), ITE( F v’, G v’, H v’ )) With terminal cases being: F = ITE( 1, F, G) = ITE( 0, G, F) = ITE( F, 1, 0) ITE( G, F, F) we define NOT( F) = ITE( F, 0, 1) AND( F, G) = ITE( F, G, 0) OR( F, G) = ITE( F, 1, G) XOR( F, G) = ITE( F,  G, G) etc.

16. B. Alizadeh Advanced Logic Design (2008) 16 / 55 Logic Operations on ROBDDs By using dynamic programming, it is possible to make the ITE algorithm polynomial: (1) The result must be reduced to ensure that it is in canonical form; - record constructed nodes ( unique table ); - before creating a new node, check if it already exists in this unique hash table

17. B. Alizadeh Advanced Logic Design (2008) 17 / 55 Logic Operations on ROBDDs (2) Record all previously computed functions in a hash table ( computed table ); - must be implemented efficiently as it may grow very quickly in size; - before computing any function, check table for solution already obtained

18. B. Alizadeh Advanced Logic Design (2008) 18 / 55 Logic Operations on ROBDDs Return Build ’ (t,1) function Build ’ (t,i) if i  n then if t is false then return 0 else return 1 else  Build ’ (t[0/ ], i+1)  Build ’ (t[1/ ], i+1) return MK(i,, ) end Build ’ MK[T, H](i, l, h) if l = h then return l else if member(H, i, l, h) then return lookup(H, i, l, h) else u  add(T,i,l,h) insert(H, i, l, h, u) return u unique Table

19. B. Alizadeh Advanced Logic Design (2008) 19 / 55 Example F = (x1 + x2) x3

20. B. Alizadeh Advanced Logic Design (2008) 20 / 55 Example uVarLowHigh 04 14 2301 3202 4132 T: u  (i,l,h) VarLowHighu 3012 2023 1324 H: (i,l,h)  u MK[T, H](i, l, h) if l = h then return l else if member(H, i, l, h) then return lookup(H, i, l, h) else u  add(T,i,l,h) insert(H, i, l, h, u) return u Return Build ’ (t,1) function Build ’ (t,i) if i  n then if t is false then return 0 else return 1 else  Build ’ (t[0/ ], i+1)  Build ’ (t[1/ ], i+1) return MK(i,, ) end Build ’

21. B. Alizadeh Advanced Logic Design (2008) 21 / 55 Example uVarLowHigh 04 14 2301 3202 4132 T: u  (i,l,h)

22. B. Alizadeh Advanced Logic Design (2008) 22 / 55 Operations on ROBDD Construct the ROBDD resulting from applying op on u1 and u2 Apply[T,H](op,u1,u2) init(G)//Computed Table return APP(u1,u2) function APP(u1,u2) = if G(u1,u2)  empty then return G(u1,u2) else if u1  {0,1} and u2  {0,1} then u  op(u1,u2) else if var(u1) = var(u2) then u  MK( var(u1), APP( low(u1), low(u2) ), APP( high(u1), high(u2) ) ) else if var(u1)  var(u2) then u  MK( var(u1), APP( low(u1), u2 ), APP( high(u1), u2 ) ) else //var(u1)  var(u2) u  MK( var(u2), APP( u1, low(u2) ), APP( u1, high(u2) ) ) G(u1,u2)  u return u end APP

23. B. Alizadeh Advanced Logic Design (2008) 23 / 55 Example of Apply Compute AND of two ROBDDs

24. B. Alizadeh Advanced Logic Design (2008) 24 / 55 Example of Apply

25. B. Alizadeh Advanced Logic Design (2008) 25 / 55 Example of Apply uVarLowHigh 05 15 2401 3302 4203 T: u  (i,l,h) VarLowHighu 4012 3023 2034 H: (i,l,h)  u u1u2APP(u1,u2) 000 100 010 220 111 122 323 444 454 G(u1,u2)  APP(u1,u2)

26. B. Alizadeh Advanced Logic Design (2008) 26 / 55 Example of Apply uVarLowHigh 05 15 2401 3302 4203 T: u  (i,l,h)

27. B. Alizadeh Advanced Logic Design (2008) 27 / 55 Operations on ROBDD Restrict the ROBDD u according to the truth assignment [b/xj] RESTRICT[T,H](u,j,b) return res(u) function res(u) = if var(u)  j then return u else if var(u)  j then return MK( var(u), res( low(u) ), res( high(u) ) ) else ( * var(u) = j * ) if b = 0 then return res( low(u) ) else ( * var(u) = j, b = 1 * ) return res( high(u) ) end res

28. B. Alizadeh Advanced Logic Design (2008) 28 / 55 Example of RESTRICT F = (x1  x2) + x3x2=0 => j=2; b=0 uVarLowHigh 04 14 2301 3221 4212 5134 T: u  (i,l,h) VarLowHighu 3012 2213 2124 1345 H: (i,l,h)  u

29. B. Alizadeh Advanced Logic Design (2008) 29 / 55 Example of RESTRICT Before applying RESTRICT algorithm

30. B. Alizadeh Advanced Logic Design (2008) 30 / 55 Example of RESTRICT Reconstruction phase

31. B. Alizadeh Advanced Logic Design (2008) 31 / 55 Example of RESTRICT uVarLowHigh 04 14 2301 3221 4212 5134 6121 T: u  (i,l,h) VarLowHighu 3012 2213 2124 1345 1216 H: (i,l,h)  u

32. B. Alizadeh Advanced Logic Design (2008) 32 / 55 Operations on ROBDD SatCount[T](u): Return number of valid truth assignments of u SatCount[T](u) return 2 var(u)-1 * count(u) function count(u) = if u=0 then res  0 else if u=1 then res  1 else res  2 var(low(u))-var(u)-1 * count(low(u)) + 2 var(high(u))-var(u)-1 * count(high(u)) Return res end count

33. B. Alizadeh Advanced Logic Design (2008) 33 / 55 Operations on ROBDD AnySat(u): Return a satisfying truth assignment for u AnySat(u) if u=0 then Error else if u=1 then [] else if low(u)=0 then return [x var(u)  1, AnySat(high(u))] else return [x var(u)  0, AnySat(low(u))]

34. B. Alizadeh Advanced Logic Design (2008) 34 / 55 Operations on ROBDD AllSat(u): Return all satisfying truth assignment for u AllSat(u) if u=0 then <> else if u=1 then else return <add [x var(u)  0] in front of all truth-assignment in AllSat(low(u)), add [x var(u)  1] in front of all truth-assignment in AllSat(high(u))>

35. B. Alizadeh Advanced Logic Design (2008) 35 / 55 Derived Operations Compose: Given F(x) and G(y), return F(G(y)) Compose is reduced to two operations Restrict and three operations Apply

36. B. Alizadeh Advanced Logic Design (2008) 36 / 55 Derived Operations Quantifications Given a function F(x1, x2, x3) Existential Quantification  x1:F(x1, x2, x3) = F(0, x2, x3) OR F(1, x2, x3) Universal Quantification  x1:F(x1, x2, x3) = F(0, x2, x3) AND F(1, x2, x3) Unique Quantification !x1:F(x1, x2, x3) = F(0, x2, x3) XOR F(1, x2, x3)

37. B. Alizadeh Advanced Logic Design (2008) 37 / 55 Logic Operations on ROBDDs Complement edges can reduce the size of an ROBDD by a factor of 2 - Only one terminal node is labeled 1 - Edges have an attribute (dot) to indicate if they are inverting or not - To maintain canonicity, a dot can appear only on low( v) edges - Complementation achieved in O( 1) time by placing a dot on the function edge - F and F’ can share entry in computed table - Adaptation of ITE easy

38. B. Alizadeh Advanced Logic Design (2008) 38 / 55 Variable Ordering 1. Window Permutation Algorithm  Example: window size k = 3; Starting point x2 k!-1 total variable exchange; k(k-1)/2 exchanging to go to best position x 1,x 2,x 3,x 4,x 5,x 6,x 7 initial x 1,x 3,x 2,x 4,x 5,x 6,x 7 swap(x 2,x 3 ) x 1,x 3,x 4,x 2,x 5,x 6,x 7 swap(x 2,x 4 ) x 1,x 4,x 3,x 2,x 5,x 6,x 7 swap(x 3,x 4 ) x 1,x 4,x 2,x 3,x 5,x 6,x 7 swap(x 3,x 2 ) x 1,x 2,x 4,x 3,x 5,x 6,x 7 swap(x 4,x 2 ) x 1,x 2,x 3,x 4,x 5,x 6,x 7 swap(x 4,x 3 ) x 1,x 3,x 2,x 4,x 5,x 6,x 7 swap(x 2,x 3 ) x 1,x 3,x 4,x 2,x 5,x 6,x 7 swap(x 2,x 4 )

39. B. Alizadeh Advanced Logic Design (2008) 39 / 55 Variable Ordering 2. Sifting Algorithm Starting point x4 x 1,x 2,x 3,x 4,x 5,x 6,x 7 initial x 1,x 2,x 3,x 5,x 4,x 6,x 7 swap(x 4,x 5) x 1,x 2,x 3,x 5,x 6,x 4,x 7 swap(x 4,x 6) x 1,x 2,x 3,x 5,x 6,x 7,x 4 swap(x 4,x 7 ) x 1,x 2,x 3,x 5,x 6,x 4,x 7 swap(x 7,x 4 ) x 1,x 2,x 3,x 5,x 4,x 6,x 7 swap(x 6,x 4) x 1,x 2,x 3,x 4,x 5,x 6,x 7 swap(x 5,x 4) x 1,x 2,x 4,x 3,x 5,x 6,x 7 swap(x 3,x 4) x 1,x 4,x 2,x 3,x 5,x 6,x 7 swap(x 2,x 4) x 4,x 1,x 2,x 3,x 5,x 6,x 7 swap(x 1,x 4) x 1,x 4,x 2,x 3,x 5,x 6,x 7 swap(x 4,x 1 ) x 1,x 2,x 4,x 3,x 5,x 6,x 7 swap(x 4,x 2 ) x 1,x 2,x 3,x 4,x 5,x 6,x 7 swap(x 4,x 3 ) x 1,x 2,x 3,x 5,x 4,x 6,x 7 swap(x 4,x 5 ) x 1,x 2,x 3,x 5,x 6,x 4,x 7 swap(x 4,x 6 ) x 1,x 2,x 3,x 5,x 6,x 7,x 4 swap(x 4,x 7 )

40. B. Alizadeh Advanced Logic Design (2008) 40 / 55 Variable Ordering 3. Group Sifting Algorithm is an extension of sifting. It moves a group of variables at the time, instead of a single variable.  Symmetric variables A boolean function f(x1,x2,…,xn) is symmetric in x i and x j if the interchange of x i and x j leaves the function identically the same. Once two variables are identified as symmetric, they are “locked” together. This effectively leads to an algorithm that sifts groups of variables of varying size.

41. B. Alizadeh Advanced Logic Design (2008) 41 / 55 Variable Ordering 4. Relative Absolute Position (RAP)  In each iteration do Sifting and Symmetry checking (Window Permutation) 1. At each iteration, a variable that has not been sifted yet is chosen 2. In each Sifting, Check it against its neighbor for symmetry 3. If symmetry is found, a group is formed and the relative position is fixed References: 1. “Who Are the Variables in Your Neighborhood”, Fabio Somenzi 2. “Dynamic Variable Ordering for Ordered Binary Decision Diagrams”, Richard Rudell

42. B. Alizadeh Advanced Logic Design (2008) 42 / 55 References 1. H.R. Andersen, “An Introduction to Binary Decision Diagrams”, Lecture notes 1997. Web: http://www.it.dtu.dk/~hrahttp://www.it.dtu.dk/~hra 2. T. Kropf, “Introduction To Formal Verification”, Springer 1999. 3. K.S. Brace, R.L. Rudell and R.E. Bryant, “Efficient Implementation of a BDD Package”, 27 th ACM/IEEE Design Automation Conference 1990, pp. 40. 4. E. M. Clarke, O. Grumberg and D.A. Peled, “Model Checking”, 1999 E.M. Clarke, O. Grumberg and Lucent Technologies. 5. http://vlsi.colorado.edu/~fabio/CUDD/

43. B. Alizadeh Advanced Logic Design (2008) 43 / 55 BDDs and their applications

44. B. Alizadeh Advanced Logic Design (2008) 44 / 55 Overview BDD-based representation of functions, functions with dcs, relations, minterms, cubes, sets, sets of sets, state machines, partitions, set systems, graphs, covering tables, matrices - what else?:) Common features of all successful BDD-based representations Detailed discussion of project possibilities Selecting representation for your problem

45. B. Alizadeh Advanced Logic Design (2008) 45 / 55 Relations Relation is a mapping B n  B m, where B = {0,1}, n > 0, m > 0. If m = 1, a relation is a function For example, F( x1,x2, y1,y2,y3 ), n = 2, m = 3 x1x1 x2x2 y1y1 y2y2 y3y3 001-0 0101- 10110 1101-

46. B. Alizadeh Advanced Logic Design (2008) 46 / 55 Relations Are Reducible to Functions Relation over variables (x1,x2,…,xn) and (y1,y2,…,ym) can be represented as a boolean function, which is 1 for a given minterm iff this minterm represents related assignments of variables (x1,x2,…,xn) and (y1,y2,…,ym).

47. B. Alizadeh Advanced Logic Design (2008) 47 / 55 Example 1 1 0 0 0 0 0 0 y1y1 1111 1011 1101 0001 1110 1010 1100 0000 y2y2 x3x3 x2x2 x1x1 x1x1 x2x2 x3x3 y1y1 y2y2 This is a relation with n = 3, m = 2

48. B. Alizadeh Advanced Logic Design (2008) 48 / 55 Example (continued) 111111 1 1 0 1 1 1 0 y2y2 1 0 0 0 0 0 0 y1y1 0 1011 1101 1001 1110 1010 1100 1000 Fx3x3 x2x2 x1x1 other x1x1 x2x2 x3x3 y1y1 y2y2 01

49. B. Alizadeh Advanced Logic Design (2008) 49 / 55 Minterms and Cubes Given a function F(x1,x2,…,xn), a product of all its variables in arbitrary polarities is a minterm A product of its variables, which does not necessarily include all variables, is a cube Each minterm is a cube; the reverse is not true

50. B. Alizadeh Advanced Logic Design (2008) 50 / 55 Implicit Cube Representation To represent cubes of n-variable function F(x1,x2,…,xn), two sets of n vars are used: signature variables S = (s1,s2,...,sn) and polarity variables P = (p1,p2,...,pn) si variable is true iff i-th variable is present in the cube; pi variable is true iff i-th variable enters this cube in positive polarity For example, cube x2x3’x4 is represented by the pair [(0111), (1101)]

51. B. Alizadeh Advanced Logic Design (2008) 51 / 55 Characteristic Function of a Set Function F: B n  B, B = {0,1}, defines a subset of minterms of B n, on which it is 1. Given a binary encoding of a set of elements, characteristic function of a subset of this set is a boolean function, which is 1 for minterms encoding the subset and 0 for other minterms.

52. B. Alizadeh Advanced Logic Design (2008) 52 / 55 Example Problem: Given the set {p0, p1, p2, p3, p4, p5 } and its encoding: p0 – p2 – p4 – p1 – p3 – p5 – find characteristic function of subset {p0, p2, p3} and represent the subset using BDD Solution: Define a function over the encoding variables (x0,x1,x2) such that it is equal to 1 for minterms representing subset {p0, p2, p3}.  {p0, p2, p3}(x0,x1,x2)= + +

53. B. Alizadeh Advanced Logic Design (2008) 53 / 55 BDD Representation of the Characteristic Function x2x2 x0x0 x1x1 10 F = +

54. B. Alizadeh Advanced Logic Design (2008) 54 / 55 FSMs: Transition Relation FSM is { I, O, S, , ) (r inputs, m states, n outputs) Transition relation is a boolean function T: B r x B m x B m  B, B={0,1} such that T( i, x, y) = 1 iff state y can be reached in one transition from state x when input i is applied

55. B. Alizadeh Advanced Logic Design (2008) 55 / 55 FSMs: Output Relation Output relation is a boolean function O: B r x B m x B n  B such that O( i, x, o) = 1 iff output o can be produced when the FSM is in state x and input i is applied