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Design Space Exploration
Hardware/Software Codesign Martin Holzer Christian Doppler Laboratory for Design Methodology of Signal Processing Algorithms June 6th, 2008 Christian Doppler Laboratory for Design Methodology of Signal Processing Algorithms
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Outline Embedded System Design Design Space Exploration Summary
System Characterization Estimation of Design Properties Multi-objective Optimization Summary
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Embedded System Design Flow
Specification model Refinement Implementation model Increased design complexity Design flow problems Design productivity gap Verification gap
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Embedded System Design Flow
Specification model Refinement Implementation model Increased design complexity Design flow problems Design productivity gap Verification gap Optimization objectives Execution cycles Silicon area Power consumption 4 4
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Motivation Up to 90% of final development costs are determined in the first phase of the development
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Design Space Exploration
Design space exploration is the process of investigating optimal implementation variants Currently manual exploration Design space not completely covered Suboptimal solutions Time consuming
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Design Space Exploration
Characterization and analysis of algorithms Estimation of implementation properties of the next level execution cycles area consumption power consumption Exploration of equally acceptable solutions
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Metrics A software metric is defined as numeric rating with the purpose to measure properties like Complexity Reliability Length Quality Performance Measurement procedure numerical rating Interpretation e.g. complexity Methods Dynamic Static
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Prediction of Implementation Effort
COCOMO Lines of Code (LoC) dependent Problem: prediction of source lines at the beginning of the project is hard Function points Based on Number of inputs Number of outputs Internal functions This measure can be derived from the specification itself
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System Representation
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Cyclomatic Complexity (V)
Minimal set of paths, where each edge is at least covered once. Number of needed test cases in order to achieve full path coverage. e = 8 v = 7 V = 8 – = 3
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Degree of Parallelism High γ high parallelism
DFG: faster computation CFG: reuse capabilities
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UMTS Slot Synchronization
Statistics Operations Control operations Variables Linguistic metric Vocabulary Structural metric Parallelism Tree height Visualization E.g. Kiviat chart
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Execution Time Estimation
Metrics Number of operations Parallelism Available resources
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Execution Time Profile
Path analysis Best Case Execution Time (BCET) Worst Case Execution Time (WCET) Infeasible paths Condition (A < 1) && (A >= 1) cannot be fulfilled BCET WCET Narrow bounds for the execution time interval
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Area Time Trade-off (1)
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Area Time Trade-off (2)
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Multi-objective Optimization
Minimization of a set of conflicting functions A decision x is Pareto optimal if there is no other decision that dominates x Set of Pareto optimal points is called Pareto front Evolutionary algorithm approach to compute Pareto front
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Evolutionary Optimisation
area complexity cycle count
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Pareto Front Examples Control flow graph 10 basic blocks No loops
1010 design points 14 Pareto optimal design points 15 basic blocks 2 loops 1020 design points 29 Pareto optimal design points
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Summary Early design decision have high cost impact System characterization with static properties Estimation of implementation properties Generation of design alternatives
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Thank you for your attention.
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Embedded System Design Flow
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Metrics Linguistic Metrics Structural Metrics
Program Vocabulary e.g. S={ADD, SUB} Memory Oriented Metrics Control Oriented Metrics Structural Metrics Cyclomatic Complexity Degree of Parallelism Object Oriented Metrics Depth of hierarchy
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Parallelism of a DFG Nop = 8 Nopl = 5 γ = 8/5 = 1,6
Nop : Total number of operations Nopl : Number of operations in the longest path Nop = 8 Nopl = 5 γ = 8/5 = 1,6 High γ high parallelism faster computation reuse capabilities Nop : Total number of operations of type j Noplj : Number of operations of type j in the longest path
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Memory Orientation Metrics (MOM)
Nop : Number of operations Nmac : Number of memory accesses Ncop : Number of control operations MOM 1 function is dominated by memory access Nop = 8 Nmop = 4 MOM = 4/12 = 1/3
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Control Orientation Metrics (COM)
Nop : Total number of operations Ncop : Number of control statements Nmac : Number of memory accesses COM 1 function is dominated by control Nop = 9 Ncop = 1 COM = 1/10 = 0,1
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VP Generation
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