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UMPC meeting STMicroelectronics Oct 21st 2009 0 Image Sensors with 3D Heterogeneous Integration GIP-CNFM November, 26th 2009 Jean-Luc Jaffard : Deputy General Manager ST Imaging Division Yvon Cazaux : Imaging Expert at LETI
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UMPC meeting STMicroelectronics Oct 21st 2009 1 Main Applications-Visible Domain Mobile Phone By far the dominant market Webcam Digital camera Biomedical (endoscopes) Automotive : emerging market
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UMPC meeting STMicroelectronics Oct 21st 2009 2 Mobile Imaging Driving Factors Cost Process complexity 200mm 300mm 90nm ; 65nm FSI vs BSI ….. Physical Size Resolution Pixel size Module height Optics Performances Low Light SNR ratio Crosstalk Speed 3D INTEGRATION ARENA
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UMPC meeting STMicroelectronics Oct 21st 2009 3 VGA Module Size Evolution Cubic Centimeter 8µm pixel Fixed focus Two element lens 1.xµm pixel Wafer level optics 3D Integration
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UMPC meeting STMicroelectronics Oct 21st 2009 4 Yellow duck-White light or White duck-Yellow light
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UMPC meeting STMicroelectronics Oct 21st 2009 5 Mechanical Design Optical Design Silicon Design Algorithms START STOP Y N Y Y Y Y N N N N Y=X²+Z+16 Y R&D Challenges : Mastering key technologies
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UMPC meeting STMicroelectronics Oct 21st 2009 6 ● Cost reduction ● Always more pixels (5MPix,8MPix, 12MPix…) Smaller and smaller pixel size ● Race for miniaturization Electrical and Optical Integration ● Many challenges for CMOS technologies Lack of sensibility Temporal & Fix Pattern Noises Dark Current Dynamic Range Dedicated Imaging Process Very Fast Market Evolution Pixel Size vs Years year Pixel size ( m) 3T Pixel 1.75T Pixel 4T Pixel 2.5T Pixel PN Photodiode Photodiode with charge transfer 4T Pixels with MOS sharing
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UMPC meeting STMicroelectronics Oct 21st 2009 7 Mains Challenges for Performances Bayer pattern SOURCE IEDM2006 _ ST Microelectronics ● Sensitivity as high as possible Large Photodiode (MOS sharing) lens to focus photons on the photodiode Very small dielectric stack, Light Guide, Back side illumination… ● Noise Reduction Dark Current optimization Fix and Random Readout Noises reduced with Double Correlated Sampling (CDS) High Signal to Noise Ratio (SNR) ● Dynamic Range Very Small Pixel Capacitance (~1fF) A Few thousands of electrons at Saturation level ● Crosstalk Optical : Light Diffraction, reflexion on metal lines Electrical : Carriers Diffusion in the epitaxial layer Colour Crosstalk
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UMPC meeting STMicroelectronics Oct 21st 2009 8 ● The Way for very Small Pixels to collect all Photons ● QE improvement ● Less sensitive to the optical aperture (metal lines shading in front side) ● Pros High Sensitivity (~100% Fill Factor) Suitable to Large Optical Apertures ● Cons Process Complexity Crosstalk more critical Cost Source STMicro. Back Side Illumination
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UMPC meeting STMicroelectronics Oct 21st 2009 9 µm CMOS Process Imager options Imager Process CMOS Capable Imager process evolution
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UMPC meeting STMicroelectronics Oct 21st 2009 10 Product spec – standards, interfaces Partitioning of a CMOS sensor-based imaging system ADCADC TxRx Colour Processor Data Format Compression (MPEG4) System Interfac e Frame Store Sensor Module Video ProcessorSystem Interface Possible levels of integration using CMOS technology Cable or FlexConnector Raw BayerYUV
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UMPC meeting STMicroelectronics Oct 21st 2009 11 Through Silicon Via Concept ● Wire bonding based package Al Pad Wire Bond Package Lead Image Sensor Through Silicon Interconnect Bump Image Sensor ● TSV based package
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UMPC meeting STMicroelectronics Oct 21st 2009 12 Through Silicon Via Pros and Cons Through via contacts From top to bottom ● Pros Allow smaller package outline No pad extension needed Wire bonding compatible layout Better density ● Cons More complex technology Glass Silicon Back-end processes Cost
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UMPC meeting STMicroelectronics Oct 21st 2009 13 Through Silicon Via Product
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UMPC meeting STMicroelectronics Oct 21st 2009 14 Wirebond and TSV modules Physical dimensions comparison VGA 5MP Image Sensor Surface (mm²) WB vs TSV module size Swb4 = (Xs+Wb+Lm)² Swb2 = (Xs+Wb+Lm) x (Xs+Lm) Stsv= Xs² Xs=sqrt (Sensor surface) 3MP Wb Lm
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UMPC meeting STMicroelectronics Oct 21st 2009 15 ● Principle Lens stacks manufactured at the Wafer level Dicing of a total Module ● Main benefits compared to conventional modules: Lower Cost Compact size (die size footprint) Low building height Very accurate alignment ● Current and Future Developments Fixed focus Auto focus image stabilization devices Zoom Optical Integration at the Wafer Level Source: http://www.polight.no Autofocus with piezo actuator Conventional module
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UMPC meeting STMicroelectronics Oct 21st 2009 16 ● Principle CMOS wafers stacking Electrical connexion between wafers TSV Molecular Bonding ● Benefits Compact camera Processing close to the pixel array Processor integrated in the BSI handler New Architecture capability (smart sensors) ● Cons Complex Assy Process Cost Yield Cu-Cu molecular bonding 3D CMOS Integration at the Wafer Level Photodetection A to D Converter Processor 3D with TSV (MIT-USA)
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UMPC meeting STMicroelectronics Oct 21st 2009 17 Camera Module Future Integration 3D Heterogeneous TSV image sensor Image processing Image memory Lenses Benefits Physical size High precision environment Assembly rules Clean environment Simplified test flow Technical challenges Manufacturing yield Mechanical and thermal effects Optical performances Dicing Cost
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UMPC meeting STMicroelectronics Oct 21st 2009 18
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UMPC meeting STMicroelectronics Oct 21st 2009 19 Conclusions ● Addressing Imaging Market means mastering multiple technologies ● µelectronics ● µoptics ● µmechanics ● Image processing ● Physical size reduction introduces more dependancies between elements and technologies ● 3D integration is even more demanding for multiple technology mastering
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UMPC meeting STMicroelectronics Oct 21st 2009 20 Thank you for your attention
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