1. Computer Architecture HPC in 2020 CASC 2009 Steve Wallach swallach”at”conveycomputer.com © 2009 Convey Computer Corporation

2. swallach - sept 2009 Convey2 Consumer Moore’s Law 1989 PC –20 MHz x1 –1 MByte RAM 16 bit memory interface 2009 PC –2000 MHz x4 (400x) –4 GByte RAM (4000x) 64 bit memory interface OS –1989 – 16 bit DOS –2009 – 64 bit DOS Dallas Morning News - 1989

3. swallach - sept 2009 Convey3 Processor - SNAPDRAGON Qualcomm's four-year, $350 million effort to design a chip that goes into small notebooks and handhelds will come to fruition next year when device makers deliver products based on the Snapdragon processor. (CNET NEWS Dec 15,2008 Technical Features for QSD8672 chipsets The single-chip, dual-CPU QSD8672™ includes: Dual CPUs, up to 1.5 GHz Low-power 45nm process technology Higher-resolution WSXGA (1440 x 900) display support High-definition (1080p) video recording and playback Support for HSPA+ 28 Mbps downloads and 11 Mbps uploads Supports CDMA2000 1X, 1xEV-DO Rel 0/A/B networks up to 80M triangles/sec and 500M+ 3D pixels/sec ( http://www.qctconnect.com/products/snapdragon.html)

4. swallach - sept 2009 Convey4 Smart Phone Processor - 2020 Power Budget –300 Milliwatts Either ARM or x86-64 compatible In 2020 all other ISA’s either will be gone or niche players (no volume) 64 bit virtual address space (maybe) 2 to 4 GBytes Physical Memory 1 Terabyte Flash 10 to 20 Gflops (real *8) –3D video drives DSP performance Reconfigurable accelerator core –Firmware for new feature set Basis of HPC –Cheapest Commodity, Low Power processor