1. Reconfigurable Computing

2. This Class is About Reconfigurable Computing Computer Architecture Coping with Change

3. Outline What’s wrong with the status quo (Admin break: handouts) Reconfigurable Computing: What and Why (break) What this class is about

4. Big Idea The Biggest Idea here is perhaps the simplest: When we have 1000x the resources, we design computer differently. (Good architecture depends on costs.)

5. Fountainhead Pathenon Quote “Look,” said Roark. “The famous flutings on the famous columns---what are they there for? To hide the joints in wood---when columns were made of wood, only these aren’t, they’re marble. The triglyphs, what are they? Wood. Wooden beams, the way they had to be laid when people began to build wooden shacks. Your Greeks took marble and they made copies of their wooden structures out of it, because others had done it that way. Then your masters of the Renaissance came along and made copies in plaster of copies in marble of copies in wood. Now here we are making copies in steel and concrete of copies in plaster of copies in marble of copies in wood. Why?

6. What About Computer Architecture? Are we making copies in submicron CMOS VLSI of copies in NMOS of copies in TTL of early vacuum tube computer designs? Mainframe->Mini->super microprocessors ? CDC->Cray1->i860->Vector microprocessors?

7. 1983 Computer Architecture VLSI is “new” to the computer architect you have 15M  in 4  m NMOS want to run “all” programs What do you build? 2

8. What can we build in 15M  12Kb SRAM (1.2K  bit) 1500 Gate-Array Gates (10K  /gate) 30 4-LUTs (500K /4LUT) 32b ALU+RF+control 2 2 2 2

9. 1983 RISC II MIPs

10. What has changed in 15 years? Technology (0.25  m CMOS) Capacity (20G  Architecture? 2

11. Capacity

12. Architecture Moved memory system on chip 32->64b datapath +FPU, moved on chip 1->4 compute units …lots of “hacks” to preserve sequential model of original uP

13. Why did we build computers this way in 1983? Yesterday’s solution becomes today’s historical curiosity. -- Goldratt

14. Why…1983?

15. More Why?

17. Have our assumptions changed? Beware of cached answers. Always check your assumptions. To stay young requires unceasing cultivation of the ability to unlearn old falsehoods. -- Lazarus Long

18. Why…1983?

19. Example HP PA-RISC8500 (Hot Chips X) SPEC fits in on-chip cache What next? Does it make sense to keep this architecture and balance as capacity continues to grow?

20. Challenging our Assumptions General-purpose computing machines don’t have to look like processors. 1000x increase in single-chip silicon capacity changes the underlying design costs.

21. Early RC Successes Fastest RSA implementation is on a reconfigurable machine (DEC PAM) Splash2 (SRC) performs DNA Sequence matching 300x Cray2 speed, and 200x a 16K CM2 Many modern processors and ASICs are verified using FPGA emulation systems For many signal processing/filtering operations, single chip FPGAs outperform DSPs by 10-100x.

22. What is Configurable Computing? Short answer: Computing via post-fabrication, spatially programmed connection of processing elements.

23. Defining Terms Computes one function (e.g. FP- multiply, divider, DCT) Function defined at fabrication time Computes “any” computable function (e.g. Processor, DSPs, FPGAs) Function defined after fabrication Fixed Function: Programmable:

24. “Any” Computation? (Universality) Any computation which can “fit” on the programmable substrate Limitations: hold entire computation and intermediate data Recall size/fit constraint

25. Benefits of Programmable Non-permanent customization and application development after fabrication economies of scale (amortize large, fixed design costs) time-to-market (evolving requirements and standards, new ideas)

26. Distinction in Instruction Binding Time Fabrication time --> Fixed function devices Beginning of product use --> Actel/Quicklogic FPGAs Beginning of usage epoch --> Reconfigurable FPGAs Every cycle --> traditional RISC processors

27. Spatial vs. Temporal Computing Spatial Temporal

28. Density Comparison

29. Spatial/Configurable Benefits 10x raw density advantage over processors potential for fine-grained (bit-level) control --- can offer another order of magnitude benefit

30. Processor vs. FPGA Area

31. Configurable Drawbacks Each compute/interconnect resource dedicated to single function Must dedicate resources for every computational subtask Infrequently needed portions of a computation sit idle --> inefficient use of resources

32. Where CC interesting? Regular applications -- need same operation repeatedly High concurrency -- large number of operations can occur simultaneously Fine-grained data -- small operand data widths

33. Implications? Post-fabrication programmable computing space >> processor arch. With 10G  dies now and 1T  on the horizon, a much wider space of computing architectures opens up. Major feature: more spatial processing, less multiplexing/sharing of resources. 22

34. Another Quote An organization must have some means of combating the process by which people become prisoners of their procedures. The rule book becomes fatter as the ideas become fewer. Almost every well established organization is a coral reef of procedures that were laid down to achieve some long-forgotten objective. -- John W. Gardner Some would argue computer architecture is falling prey to this phenomenon.

35. What’s it about? Architectures for late-bound computing systems Emphasis on spatial computing Re-exam what goes into these architectures and why Build up tools, techniques, and intuition for the architect and system designer

36. Topics Instructions Interconnect Compute elements Retiming Specialization Control Allocation Costs Comparisons Modeling Mapping Architecture Components Related Issues