1. 27/9/2011TWEPP 2011 F. Anghinolfi CERN/PH/ESE1 The Electronics System of the ALFA Forward Detector for Luminosity Measurements in ATLAS Presenter : F. Anghinolfi B. Allongue 1, J. Alozy 1, G. Blanchot 1, S. Franz 1, W. Iwanski 1, V. Lorentzen 2, B. Lundberg 3, S. Jakobsen 4, K. Korcyl 5 1 CERN, 2 HIST Trondheim, 3 Lund University, 3 NPI Copenhagen, 5 INP PAN, Cracow

2. 27/9/2011TWEPP 2011 F. Anghinolfi CERN/PH/ESE2 ALFA Mechanics Electronics Detector LHC

3. 27/9/2011TWEPP 2011 F. Anghinolfi CERN/PH/ESE3 ALFA : Absolute Luminosity Measurement Each “RP” is a 20x20mm mini tracker made of 10 planes of staggered scintillating fibers in U and V directions, plus 2 scintillating plates covering the tracking area for producing trigger signals Two small trackers symmetrically placed around the proton beam, the detector to beam distance can be as low as 1.5mm. Measure the elastic beam scattering at very low distance of the beam. One “UP” One “DOWN” UP DOWN

4. ALFA R/O electronics 27/9/20114TWEPP 2011 F. Anghinolfi CERN/PH/ESE Up Down Up Down Up Down Up Down RR13 alcove RR17 alcove USA15 counting room 250m + through tunnel & galleries In alcove : LV power supplies USA15 : HV units DCS control & monitor ROD LV PFC and control CTP Each station (A, B): 2 pots (up and down) 2 readout systems (PMF + Motherboard) 1 (main) Patch Box 2 HV dispatchers For A&B : 1 optolink dispatcher Each station (A, B): 2 pots (up and down) 2 readout systems (PMF + Motherboard) 1 (main) Patch Box 2 HV dispatchers For A&B : 1 optolink dispatcher

5. ALFA R/O electronics 27/9/20115TWEPP 2011 F. Anghinolfi CERN/PH/ESE RR13/17 alcove USA15 counting room In alcove : LV power supplies USA15 : HV units DCS control & monitor ROD LV PFC and control CTP LV voltages 380V DC Maraton Control ConnectionsSource/dest. LV PowerLocal alcoves TTCUSA15, fiber Data (Read)USA15, fiber Control & Monitoring USA15, CAN bus HVUSA15, electrical Patch Box B Down B Up B Down A Up A Patch Box A HV PatchOpto Patch Control & Monitoring (DCS) TTC, Data localtunnel

6. ALFA R/O electronics 27/9/20116TWEPP 2011 F. Anghinolfi CERN/PH/ESE USA15 counting room USA15 : HV units DCS control & monitor ROD LV PFC and control CTP ConnectionsSource/dest. Main TriggerAir core, USA15 (CTP) OVLP TriggerUSA15, electrical Down B Up B Down A Up A localtunnel Main Trigger 2 overlap Trigger Main Trigger TRIGGER SIGNALS

7. ALFA R/O electronics 27/9/20117TWEPP 2011 F. Anghinolfi CERN/PH/ESE PMT readout MAROCALFA-RMotherboardTunnelUSA15 L1 Buffer & serializer 40Mb/s Serializer 1.2Gb/s Track Data Flow PMT readout Line Drivers Trigger Flow PMT readout Registers SPI interface Configuration Flow ROD DCS CTP, Trigger Logic On Each Pot FE structure : PMF MAROCALFA-TTrigger Mez.TunnelUSA15 “Lucid” PMF Mask/AND

8. ALFA R/O electronics 27/9/20118TWEPP 2011 F. Anghinolfi CERN/PH/ESE PMT readout L1 Buffer & serializer 40Mb/s Serializer 1.2Gb/s Data Flow AD Trigger Latency Buffer Serializer FE structure : PMF (23x) Fast Shaper Per channel adjustable Gain Variable Threshold MAROC2 ASIC Trigger Latency Buffer & Ser. MAROC2 configuration ALFA-R FPGA AmplifierDiscriminator Serializer Buffer 23x Buffer & Ser. Data Format ALFA-R Data Flow control SPI interface ALFA-M FPGA 64 channels On Motherboard Kapton cable Tracking Data flow on each detector To USA15 From PMT Trigger

9. ALFA R/O electronics Aimed for compact, removable electronics Minimal cabling constraints (from USA to RP) FE Electronics centered around the MAROC2 ASIC developed by LAL/Orsay for MA-PMT readout systems Partial Radiation Hardness (Power supplies and regulation, ELMB, TTC GOL QPLL etc …) 27/9/20119TWEPP 2011 F. Anghinolfi CERN/PH/ESE

10. Detector and Front-End Parts 27/9/201110TWEPP 2011 F. Anghinolfi CERN/PH/ESE 3 stacked PCB mounted on the MAPAMT pins : HV distribution, signal distribution, active layer (pictures on the right) MAROC side ALFAR FPGA side

11. 27/9/2011TWEPP 2011 F. Anghinolfi CERN/PH/ESE11 Detector View ●10 tracking modules, 3 overlaps and 2 triggers ●1460 fibres and trigger lightguide bundles to optical connectors ● 2 LED and 2 PT100 sensor

12. ALFA Electronics on each pot Detector 23 PMFs : 5 rows 1460 readout channels ConnectionsSource/dest. LV PowerLocal alcoves TTCUSA15, fiber Data (Read)USA15, fiber Control & MonitoringUSA15, CAN bus TriggersUSA15, electrical “Motherboard” Targets : Collects and serialize data from 23 PMFs Long distance links to USA15 (no repeaters) Independent control and monitor through ELMB Removed from tunnel when not in use 27/9/201112TWEPP 2011 F. Anghinolfi CERN/PH/ESE

13. Functions distributed in the front-end electronics 27/9/2011TWEPP 2011 F. Anghinolfi CERN/PH/ESE13 ALFA_T 2 Trigger Main + 2 Trigger OVLP ALFA_M DataReq L1A ALFA_R DataReady DataOut+BCR+ECR DataReady DataOut+BCR+ECR x1 x23 64 Tracks On Mezzanine On PMF DataReq L1A ELMB On Motherboard ALFA_T functions : Local Trigger Pattern Main Trigger Charge Trigger rate counter LED pulser ALFA_R functions : Tracking Pattern Track Detector Charge measurement * ALFA_M functions : SYNC & SEND DATA Track Detector Charge measurement * SPI interface (PVSS control) * : Special run, very low trigger rate, standalone ALFA, special data format ELMB/PVSS functions : MAROC configuration Channel masking LED Pulse parameters Trigger pattern configuration Latency adjustment Monitoring To GOL SPI

14. Motherboard Main Functionalities 23 PMFs for measurement with 64 pixels >> 64 bits of data for each PMF PMF passes its raw data serially to the ALFA-M controller ALFA M collects raw data with the same L1ID and then transmit it through a GOL link to the ROD DATA ROD (USA15) TTC Module (USA15) TTCCAN BUS 5 PMFs 4 PMFs 5 PMFs MB1 connector MB2 connector MB3 connector MB4 connector MB5 connector CAN BUS connector GOL connector ALFA M FPGA Motherboard Serial links ELMBTTC rx TTC Connector GOL chip QPLL SPI POWER System clocked at 40MHz, few KHz L1 rate 11A, 5V (with 23 PMFs) 27/9/201114TWEPP 2011 F. Anghinolfi CERN/PH/ESE

15. 27/9/2011TWEPP 2011 F. Anghinolfi CERN/PH/ESE TTCR FPGA ALTERA EP3C40F780C6 N +7V (MB) +5V (MB) QPLL (40MHz LVDS) SPI Bus (from MB) Regulators Trigger Pattern (LVDS @ 40 MHz) Trigger Data (LVDS @ 40 MHz) Spare IO (8) Spare LVDS (3) Interface to Trigger Mezzanine Motherboard Details ReferencesTemp probe PMF config (SPI) PMFs Row ADC Analog DataReady/Out PMF config (SPI) PMFs Row ADC Analog DataReady/Out PMF config (SPI) PMFs Row ADC Analog DataReady/Out PMF config (SPI) PMFs Row ADC Analog DataReady/Out TTCRx PMF config (SPI) PMFs Row ADC Analog DataReady/Out SPI DCS CAN bus ELMB Opto Iolation Ports Opto link VCSEL Data GOL Monitors Pin Diode Clock distribution Optolink QPLL50MHz 15 Capability of track charge measurement (to measure charge collection degradation)

16. Trigger Mezzanine Functionalities 4 “LUCID” PMFs for Trigger charge measurement and time detection Triggers Outputs are programmable combination of Trigger inputs (2 main, 2 OVLP) Two programmable pulse generators for in-detector test LEDs DATA POWER Main1 Trigger OVLP1 Trigger Main2 Trigger OVLP2 Trigger Main Trigger PMF OVLP Trigger PMF Main Trigger PMF OVLP Trigger PMF Mezzanine Drivers SPI MB connector Test LEDs (2) Main Trigger (1) OVLP Trigger (2) Mother Board ALFA T FPGA 27/9/201116TWEPP 2011 F. Anghinolfi CERN/PH/ESE

17. 27/9/2011 PMF LUCID 1PMF LUCID 2 Interface Trig1,2Trig3,4 ADC Analog FPGA ALTERA EP3C25F256CN +7V (MB) +5V (MB) QPLL (40MHz LVDS) SPI Bus (from MB) PMF Config DAC LED Driver LED Pulse LED1 LED2 Main Trigger Overlap 1 Overlap 2 Air-core OVL1 OVL2 NIM Drivers Regulators Trigger Pattern (LVDS @ 40 MHz) Trigger Data (LVDS @ 40 MHz) Spare IO (8) Spare LVDS (3) Interface to “LUCID” PMFs (LUND Devlpt.) Two PMFs plugged on the mezzanine; Two interface holding lemo inputs and attenuators on top of LUCID PMFs. Interface to MB: Two connectors to bring power and to interface with ALFA-R: clock, config bus, trigger pattern, qdc outputs; Spare single ended and LVDS IOs. 17 Trigger Mezzanine Details Capability of trigger charge measurement : the trigger charge is measured and transmitted at every L1, together with tracking data and the trigger pattern

18. 27/9/2011TWEPP 2011 F. Anghinolfi CERN/PH/ESE18 The Trigger mezzanine contains the circuits for :  LED Pulsers (2 LEDs installed in each pot for light excitation)  Trigger Logic (trigger signal can be a combination of the 4 trigger sources)  Main Trigger charge measurements  Triggers signal processed by the MAROC2 chip, mounted on the LUCID PMF MB Mezzanine Lucid PMF With Maroc Triggers Inputs Triggers Inputs Adaptor = LEMO connector Main Trigger Overlap 1 Overlap 2 LED Pulse 1 LED Pulse 2 Connectors Trigger Mezzanine Details (2)

19. ALFA “Motherboard” implementation 27/9/2011TWEPP 2011 F. Anghinolfi CERN/PH/ESE19 FPGA ELMB Trigger Mezzanine Temp Connector ELMB Conn.1 ELMB Conn.2 Power Conn.TTC Fiber GOL link ELMB : control and monitoring Trigger Mezzanine

20. ALFA Electronics implementation 27/9/2011TWEPP 2011 F. Anghinolfi CERN/PH/ESE20 Partial view of the kaptons cabling, PMF are located inside, HV connectors on the right trigger signals on the left. White wires are the internal HV lines. PMT, PMF and kaptons are enclosed in a dark box, the motherboard carrying other elements (ELMB, trigger mezzanine) is vertical on the edge

21. TWEPP 2011 F. Anghinolfi CERN/PH/ESE27/9/2011 Electronics commissionning 21 No light HV ON Light ~1p.e. HV 950V Electronics commissioning was performed on the 8 systems just before installation and repeated after installation

22. TWEPP 2011 F. Anghinolfi CERN/PH/ESE27/9/2011 Electronics commissioning 22 Electrical test stand : one charge signal injected in one channel. The method was used to verify the channel mapping for DAQ reconstruction LED test stand : one long distance LED (about 1m and light diffuser) is used to illuminate all channels. In this plot one PMF “row” is not operational, as well as a 3 other PMTs (HV off)

23. TWEPP 2011 F. Anghinolfi CERN/PH/ESE27/9/2011 Electronics commissioning 23 Internal LED pulser : light is passing through leaks in the optical connectors. More light at the center (where the LED is located). Test on one RP system after its installation in the tunnel.

24. TWEPP 2011 F. Anghinolfi CERN/PH/ESE27/9/2011 Electronics commissioning 24 Internal LED pulser : ON LINE MONITORING Top left figure : on-line hits display Top right figure : Number of hits per layer Left : number of layer with hits

25. TWEPP 2011 F. Anghinolfi CERN/PH/ESE27/9/2011 Electronics commissioning 25 TOP : first tracks reconstruction, after installation. LHC normal run, ALFA in “garage” mode Top right : Accumulated hits display on one detector (20 layers), LHC normal run, ALFA in garage mode Bottom right figure : Reconstructed tracks projection. Double hits reconstruction show up reco outside of the detector area Plots are Courtesy of ALFA soft team

26. TWEPP 2011 F. Anghinolfi CERN/PH/ESE27/9/2011 Electronics commissioning 26 Detector layer hits during LHC runs, 20 layers in one RP, garage position

27. TWEPP 2011 F. Anghinolfi CERN/PH/ESE27/9/2011 Electronics commissioning 27 Trigger signals Charge measurements (internal LED) for the 8 pots

28. TWEPP 2011 F. Anghinolfi CERN/PH/ESE27/9/2011 Installation in LHC Tunnel 28

29. TWEPP 2011 F. Anghinolfi CERN/PH/ESE27/9/2011 ALFA Electronics 29 All 8 pots fully operational right after installation in January 2011 The track signals charge measurement will be installed during 2011 winter shut down (firmware update) Connections to the ATLAS CTP and trigger signals timing adjustment performed after installation (commissioning still going on, insertion to the Level 1 ATLAS trigger system) Some specific LHC runs with low beta angle are used to commission the detector for physics (in coordination with TOTEM)

30. ALFA ELECTRONICS 27/9/2011TWEPP 2011 F. Anghinolfi CERN/PH/ESE30 SPARES

31. Data readout : modified modes 27/9/2011TWEPP 2011 F. Anghinolfi CERN/PH/ESE31 ALFAT ALFAR ALFAT Event Maroc Delay Pipelined track hit ALFAR ALFAT L1 Pipelined TRIG hit Pipelined TRIG_ADC hit DataReq Maroc + combinatorial Delay Maroc + MUX + ADC Delay Buffer Track hit TRIG hit BC tag, L1 tag ALFAR ALFAT Problem here : the interval is made of 3 successive functions : 1 – MAROC (50ns) 2 – Scan channels (up to 5 = 5us ?) 3 - ADC (500ns)  It may exceed the latency time (?) Warning. TheMUX ADC delay is different for the two QDC channels ! SER. To MB

32. Trigger QDC readout : modified modes 32 Trigger Counters 12 significant bits16 significant bits BCID/L1ID Trigger Pattern 16 significant bits 64 bits (4 groups of 16 bits) T.Count number of bits : Hypothesis : for an average count per ms the maximum theoritical count is 40K. 16 bits is 65K. There is no minimum count limit. A realistic number would be 200 (5Khz hit rate, no background) Trigger Charge 2Trigger Charge 1 12 significant bits 27/9/2011TWEPP 2011 F. Anghinolfi CERN/PH/ESE

33. 27/9/2011 Electronics commissionning 33 No light HV ON Light ~1p.e. HV 950V Light ~1p.e. HV 900V