1. 1 Warsaw University of Technology Faculty of Electronics and Information Technology Institute of Electronic Systems HARDWARE SIMULATOR of the high-resolution CCD chip for.... SŁAWOMIR STANKIEWICZ Wilga 2006, 3.06.2006

2. 2 Device designers: Electronics & Software: Sławomir Stankiewicz - Institute of Electronic Systems supervised by: G. Kasprowicz - Institute of Electronic Systems R. Romaniuk, K. Pozniak - Institute of Electronic Systems project coordinators: G.Wrochna - Soltan Institute for Nuclear Studies L.Mankiewicz - Center for Theoretical Physic PAS

3. 3 Outline 1.Quick introducing to the „Pi of the Sky” cameras 2.Problems during camera developing 3.Goals of the CCD Simulator project 4.Features of the designed Simulator 5.Block diagram of the whole system (Camera+Simulator) 6.Camera’s test procedure 7.Block diagram of the CCD Simulator and how it works 8.CCD Simulator parameters 9.Current photos of the Simulator 10.Further plans

4. 4 Introduction to the “Pi of the Sky” project CCD cameras 2003 2004 2005

5. 5 Prototyping and launching-up the camera very high price of CCD chip first turn-on „high sensitivity” of the CCD for abnormal conditions: like ESD logical compatibility of signals given in datasheet. Tune-up of camera waveforms tune-up of the camera analogue part (amplifier, reset cut-off circuit) unexpected failures and accidents - during tests Main tasks and problems:

6. 6 What the CCD chip is?

7. 7 Primary goals Over 20 cameras are manufactured at present stage of the project and each of them has to be tested. Speed up of the testing stage by automatical detection of electrical errors dangerous for the CCD: power supplies, control, load. Other goals The Simulator can be useful during further R&D stage, ie. an analogue amplifier tune-up.

8. 8 Features of the CCD Simulator all critical voltages and signals monitoring, which can be dangerous for CCD sensor connected to the camera by original CCD Socket-plug – quick applying output can be short-circuited without any consequences source of programmable digital „image” - useful during transient analysis of different configurations of AD conversion channel when broken it costs much less than the new CCD

9. 9 Block diagram of “inverted camera” idea

10. 10 Camera’s test procedure optical assembly test of PCB – no CCD electrical test software response test - no CDD – only with Host PC final test with the CCD chip with Simulator statical test - only voltages measurements dynamic test – overall behaviour of signals dynamic tests – image generation

11. 11 Block diagram of the device

12. 12 Main Board of the Simulator CCD Socket Connectors Conditioning Block USB RS232 MUX DA Converters CCD shape Plug FPGA MCU SDRAM Keyboard LCD

13. 13 Parameters of the Simulator generation of full resolution arbitrary picture (4Mpix) using embedded 8MB SDRAM and 16bit DAC two independent video channels (15MHz horizontal clock rate max.) critical voltages measurement – results displayed on local LCD and alarmed if margins exceeded – 3 levels of alarms avalible fully autonomous or PC controlled work two simulated types of CCD chips (Fairchild, STA) easy connection to camera using the CCD emulator header embedded simple test patterns for quick tests noise level (??) RS232 and USB 2.0 (full-speed) interfaces on-board

14. 14 Summary Construction status: PCB’s assembled and checked FPGA, and MCU Software currently under development Planned activities: PC Software (GUI) final tests with camera documentation completing optimalization (noise, ergonomics) Date of planned commissioning : August 2006 Thank you for your attention......