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MOSFET Transistor Basics
AVLSI Workgroup Paul Hasler
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Diffusion of Charge over Barrier
Ec qDV Ec E0 Ec Ef Case I: P(E) ~ exp( - E0 /kT) Case II: P(E) ~ exp( - ( E0 - qDV)/kT) Ratio of Case II to Case I = 1 P(E) = ~ e-(E-Ef)/kT 1 + e-(E-Ef)/kT exp( DV / UT ) UT = kT/q
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P-N Junctions Depletion Layer or Region N-type ND P-type NA qND Charge
Density -qNA Band Diagram
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P-N Junctions --- Diodes
N-type ND P-type NA First-Principles Model
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A MOSFET Transistor Source Drain Gate Drain Gate Source Substrate
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Self-Aligned Process How do we make a basic transistor element?
We create a silicon-oxide “stencil” (or mask) We get highly repeatable gates because the gate acts as a stencil as well
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CMOS Process Cross Section
(n-well) CMOS Process = nFETs and pFETs are available all p-n junction must be reversed bias
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MOS Transistor Operation
Use subthreshold operation as the fundamental case Sub-VT operation simplifies this 2D problem to 2 1D problems Allows intuition across sub-VT and above-VT operation
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Water Analogy of a MOSFET
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Channel Current Dependence on Gate Voltage
In linear scale, we have a quadratic dependence In log-scale, we have an exponential dependence
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MOSFET Channel Picture
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MOS Capacitor Picture
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MOSFET Channel Picture
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Calculation of Drain Current
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( ) I = I e - e ( ) ( ) d n Dn = dx No recombination Dn = Ax + B l dn
2 n No recombination Dn = Dn = Ax + B dx 2 dn d D n 2 = D + G - R dt n dx 2 l y varies as kVG dn n - n (qDn / l) (e-(Y - Vs)/UT - e-(Y - Vd)/UT) J = qD = qD source drain = n dx n l ( ) ( ) ( ) k V - V / u k V - V / u I = I e - g S T e g d T
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MOSFET Current-Voltage Curves
( ) e I u V T d g S - = / k ( ) I = I e KV / u e - V / u - e - V / u G T S T D T DS ( ) ( ) k ( ) = V - V / u - - I e 1 - e V V / u g S T d S T ( ) = I e ( KV - V ) / u 1 - e - V / u G S T dS T = I e ( KV - V ) / u G S T
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Channel Current Dependence on Gate Voltage
In linear scale, we have a quadratic dependence In log-scale, we have an exponential dependence
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Channel Current Dependence on Gate Voltage
0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 10 -11 -10 -9 -8 -7 -6 Gate voltage (V) Drain current (A) k = Io = fA In linear scale, we have a quadratic dependence In log-scale, we have an exponential dependence
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Determination of Threshold Voltage
0.4 0.5 0.6 0.7 0.8 0.9 1 0.1 0.2 0.3 1.1 Gate voltage (V) Drain current / subthreshold fit VT = 0.86
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Drain Current --- Source Voltage
0.6 0.65 0.7 0.75 0.8 0.85 0.9 10 -12 -11 -10 -9 -8 -7 Gate voltage (V) Drain current (A) UT = 25.84mV k = 0.545
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Origin of Drain Dependencies
Increasing Vd effects the drain-to-channel region: increases barrier height increases depletion width
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Cause of DIBL
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Drain Characteristics
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Current versus Drain Voltage
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Current versus Drain Voltage
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Current versus Drain Voltage
Not flat due to Early effect (channel length modulation)
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Current versus Drain Voltage
Not flat due to Early effect (channel length modulation) In BJTs --- Base Modulation Effects
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Current versus Drain Voltage
Not flat due to Early effect (channel length modulation) Id = Id(sat) (1 + (Vd/VA) ) or Id = Id(sat) eVd/VA In BJTs --- Base Modulation Effects
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Drain Induced Barrier Lowering
Data taken from a popular 1.2mm MOSIS process Data taken from a popular 2.0mm MOSIS process
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MOSFET Operating Regions
Qs = e (Y - Vs)/UT Y = ln( 1 + e ) (k(Vg - VT) - Vs)/UT (EKV modeling) Below Threshold Above Threshold End on mobile charges in channel End on fixed ions in bulk Field Lines from gate charges Charge boundary condition at source Set by Fermi Distribution Cox(k(Vg-VT)-Vs) Approximate surface potential kVg ln(Qs) Channel current flows Diffusion Drift
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MOS-Capacitor Regions
Surface potential moving from depletion to inversion Qs = e (Y - Vs)/UT Qs = ln( 1 + e ) (k(Vg - VT) - Vs)/UT Depletion (k(Vg - VT) - Vs < 0) Qs = e (k(Vg - VT) - Vs)/UT Inversion (k(Vg - VT) - Vs > 0) Qs = (k(Vg - VT) - Vs)/UT
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Band-Diagram MOSFET Picture
picture moving from subthreshold to above-threshold Conduction band bends due to electrostatic force of the electrons moving through the channel
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Physics Based Models: Channels
What if Hodgkin and Huxley had known / understood MOSFET transistors when developing the original modeling….. E K Na C V me m M N a - - + - V + + - - + + - - + + - + + + - - - + - - + + - Outside - Inside + + - - + + Gate Source Drain n + n + De pl e ti o n L ay e r l = Channel Length p-substrate Y E c V d s E c Utilizing the physics of physical medium (Si) to efficiently implement computation [Farquhar and Hasler, 2004]
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