Presentation is loading. Please wait.

Presentation is loading. Please wait.

DYNAMIC TEST SET SELECTION USING IMPLICATION-BASED ON-CHIP DIAGNOSIS Nicholas Imbriglia, Nuno Alves, Elif Alpaslan, Jennifer Dworak Brown University NATW.

Similar presentations


Presentation on theme: "DYNAMIC TEST SET SELECTION USING IMPLICATION-BASED ON-CHIP DIAGNOSIS Nicholas Imbriglia, Nuno Alves, Elif Alpaslan, Jennifer Dworak Brown University NATW."— Presentation transcript:

1 DYNAMIC TEST SET SELECTION USING IMPLICATION-BASED ON-CHIP DIAGNOSIS Nicholas Imbriglia, Nuno Alves, Elif Alpaslan, Jennifer Dworak Brown University NATW 2010

2 Motivation  As electronic devices become smaller, they become more and more susceptible to wearout and latent defects:  Time Dependent Dielectric Breakdown (TDDB)  Negative Bias Temperature Instability (NBTI)  Electromigration

3 Motivation  This susceptibility is application and workload dependent  Large ramifications for the online testing of homogeneous, multi-core architectures  If a core fails, similar cores should be tested

4 Our Solution  Efficient online error detection  Detect during normal circuit operation  Efficient online testing of homogeneous cores  Test sets short in length  Focus on a small area of the circuit  Multiple detects in this area

5 Our Solution  We wish to use the diagnostic information inherent to logic implications to target specific sections of a device  We can then develop test sets specially suited for testing these sections online  These test sets, since they focus only on a portion of the device, can be very short and can be run with minimal interruption of the device’s normal operation

6 Related Work  Online Error Detection  Triple Modular Redundancy  Berger and Bose Lin Coding  Logic Implications  Online Test  Concurrent Autonomous Chip Self-Test Using Stored Test Patterns (CASP)

7 Logic Implications  Provide valuable diagnostic resolution  The checker hardware requires very little knowledge about the circuit’s current state b = 1 f = 0

8 Logic Implications  Provide valuable diagnostic resolution  The checker hardware requires very little knowledge about the circuit’s current state sa0 sa1 b = 1 f = 0

9 Hardware Implementation

10 High Level Overview

11 Test Set Selection Process

12 Generating Pattern Scores  Scores reflect how valuable a pattern is for a given implication  While multiple detections of a fault are useful, we also wish to promote patterns that allow for full coverage of the faults detectable by an implication

13 Step #1: Fault Dictionary and Implication Table Test Pattern # 012345 Faults a stuck-at 0001011 a stuck-at 1010100 b stuck-at 0010000 b stuck-at 1000111 c stuck-at 0100000 c stuck-at 1011111 d stuck-at 0100000 d stuck-at 1000001 e stuck-at 0000010 e stuck-at 1010001 f stuck-at 0001101 f stuck-at 1100010 g stuck-at 0100000 g stuck-at 1011000 h stuck-at 0000100 h stuck-at 1001001 i stuck-at 0011010 i stuck-at 1100100 Implication # 012 Faults a stuck-at 0010 a stuck-at 1001 b stuck-at 0010 b stuck-at 1001 c stuck-at 0100 c stuck-at 1010 d stuck-at 0010 d stuck-at 1001 e stuck-at 0010 e stuck-at 1100 f stuck-at 0100 f stuck-at 1001 g stuck-at 0001 g stuck-at 1010 h stuck-at 0100 h stuck-at 1010 i stuck-at 0001 i stuck-at 1010

14 Step #2: Select the Implication Test Pattern # 012345 Faults a stuck-at 0001011 a stuck-at 1010100 b stuck-at 0010000 b stuck-at 1000111 c stuck-at 0100000 c stuck-at 1011111 d stuck-at 0100000 d stuck-at 1000001 e stuck-at 0000010 e stuck-at 1010001 f stuck-at 0001101 f stuck-at 1100010 g stuck-at 0100000 g stuck-at 1011000 h stuck-at 0000100 h stuck-at 1001001 i stuck-at 0011010 i stuck-at 1100100 Implication # 012 Faults a stuck-at 0010 a stuck-at 1001 b stuck-at 0010 b stuck-at 1001 c stuck-at 0100 c stuck-at 1010 d stuck-at 0010 d stuck-at 1001 e stuck-at 0010 e stuck-at 1100 f stuck-at 0100 f stuck-at 1001 g stuck-at 0001 g stuck-at 1010 h stuck-at 0100 h stuck-at 1010 i stuck-at 0001 i stuck-at 1010

15 Test Pattern # 012345 Faults a stuck-at 0001011 a stuck-at 1010100 b stuck-at 0010000 b stuck-at 1000111 c stuck-at 0100000 c stuck-at 1011111 d stuck-at 0100000 d stuck-at 1000001 e stuck-at 0000010 e stuck-at 1010001 f stuck-at 0001101 f stuck-at 1100010 g stuck-at 0100000 g stuck-at 1011000 h stuck-at 0000100 h stuck-at 1001001 i stuck-at 0011010 i stuck-at 1100100 Implication # 012 Faults a stuck-at 0010 a stuck-at 1001 b stuck-at 0010 b stuck-at 1001 c stuck-at 0100 c stuck-at 1010 d stuck-at 0010 d stuck-at 1001 e stuck-at 0010 e stuck-at 1100 f stuck-at 0100 f stuck-at 1001 g stuck-at 0001 g stuck-at 1010 h stuck-at 0100 h stuck-at 1010 i stuck-at 0001 i stuck-at 1010 Step #2: Select the Implication Test Pattern # 012345 Faults a stuck-at 0001011 b stuck-at 0010000 c stuck-at 1011111 d stuck-at 0100000 e stuck-at 0000010 g stuck-at 1011000 h stuck-at 1001001 i stuck-at 1100100

16 Step #3: Calculate Scores Test Pattern # 012345 # of DetectsFault Values Faults a stuck-at 000101101 a stuck-at 101000001 b stuck-at 001111101 b stuck-at 110000001 c stuck-at 000001001 c stuck-at 101100001 d stuck-at 000100101 d stuck-at 110010001 Pattern Scores 234233

17 Step #4: Pick the Pattern with the Highest Score Test Pattern # 012345 # of DetectsFault Values Faults a stuck-at 000101101 a stuck-at 101000001 b stuck-at 001111101 b stuck-at 110000001 c stuck-at 000001001 c stuck-at 101100001 d stuck-at 000100101 d stuck-at 110010001 Pattern Scores 234233

18 Step #3 (again): Calculate Scores Test Pattern # 01345 # of DetectsFault Values Faults a stuck-at 00001110.135 a stuck-at 10100001 b stuck-at 00111110.135 b stuck-at 11000001 c stuck-at 00001001 c stuck-at 10100010.135 d stuck-at 00000110.135 d stuck-at 11010001 Pattern Scores 21.271.1351.270.405

19 Step #3 (again): Calculate Scores Test Pattern # 01345 # of DetectsFault Values Faults a stuck-at 00001110.135 a stuck-at 10100001 b stuck-at 00111110.135 b stuck-at 11000001 c stuck-at 00001001 c stuck-at 10100010.135 d stuck-at 00000110.135 d stuck-at 11010001 Pattern Scores 21.271.1351.270.405

20 Implication Assignment Table

21 Experimental Setup

22 Experimental Results

23 Stuck-At Fault Detections

24 Transition Fault Detections

25 Experimental Results

26 Conclusion  We have formulated a procedure for extracting diagnostic information from logic implications  This information was then used to target a specific area of the circuit that is suspected of having an error  Narrowing down the possible locations of an error allowed for the creation of very small, highly specialized test sets

27 Future Work  Additional work could be done to narrow down the suspected sites even further  A given pattern will only detect a subset of the faults covered by an implication  The results of running patterns could further pinpoint a fault’s location


Download ppt "DYNAMIC TEST SET SELECTION USING IMPLICATION-BASED ON-CHIP DIAGNOSIS Nicholas Imbriglia, Nuno Alves, Elif Alpaslan, Jennifer Dworak Brown University NATW."

Similar presentations


Ads by Google