1. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Michał Bochenek Work Package 3: On-Detector Power Management Schemes

2. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Training: Workshops and conferences Technical training Complementary training: language and management Work: General description and progress with main research activities Goals and milestones Additional research activities Dissemination: Presentations, posters, papers The participation and organisation of network events Impact & plans for future Outline:

3. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Training

4. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 SLHC-PP Annual Meeting (February 2009) International Solid-State Circuits Conference (February 2009) Adaptive Power Management Course Low-voltage and Mixed Signal CMOS Circuit Design Course Second Common ATLAS CMS Electronics Workshop for SLHC (March 2009) EIROforum School of Instrumentation (ESI) (May 2009) TWEPP-09 Topical Workshop on Electronics for Particle Physics (September 2009) Power Working Group Meeting ATLAS–CMS Power Working Group (March 2010) Learning from workshops and conferences

5. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Operational Amplifiers: Theory & Design (November 2008) Adaptive Power Management Course (February 2009) Low-Voltage and Mixed Signal CMOS Circuit Design Course (February 2009) Low-Power, Low Voltage Analog IC Design (June 2009) Introduction to Analogue IC Design: Layout and post layout verification (November 2010) Introduction to Analogue IC Design: Schematic entry and simulation (January 2010) Radiological Protection Course (January 2010) Technical training

6. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Language course (French) - 3 levels completed (October 2008 – June 2010) Managing Teams (November 2009) Marie Curie Fellows at CERN for general and poster presentations (November 2010) Project Engineering (January 2010) Leaders in science – learning from experience (June 2010) Complementary training

7. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Work

8. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 My Work: Motivation & Background After the High Luminosity Upgrade, the number of channels in SLHC tracker will be increased 10 times. Although the electronics in the ATLAS tracker will operate at reduced voltage, the power consumption will remain the same. New solutions for power management are under development. There are possible solutions assuming the use of DC-DC switched- capacitor converters.

9. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Step-down converter ABCN 2.8V gnd DC/DC buck converter on module ABCN Digital 0.9 V Voltage Regulator 1.2 V ABCN Analog DC-DC Step- down /2 2V gnd DC/DC buck converter on module DC-DC Step- down /2 1.4 V 10V

10. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Step-up converter vddd gndd vdda gnda Fully integrated Shunt Regulator ABCN Digital 0.9 V 1.2V1.2V 1.5V1.5V ABCN DC-DC Charge pump Voltage Regulator ABCN Analoge

11. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Implementation on the chip The 2x2 mm 2 chip designed in 130 nm IBM technology was submitted during the tape-out in June. The chip consists of four prototype devices: Two step-down switched capacitor converters, Two charge pumps.

12. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Goals and milestone status Tasks completed: Training (CAD tools, rad-tol ASIC design) The design of the two types of the DC-DC switched-capacitor converters: Choosing the proper architecture which fulfills the requirements SPECTRE simulations that included corner and statistical analysis Drawing the layout of both devices Assembling the whole chip containing the prototype devices In progress: Design of the voltage regulators (submission in November) To be done: Lab (radiation) tests of the converters (probably in October) Integration of converters and the regulators on the proto module Fabricate the final ASIC and preliminary tests

13. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Radiation effects and chip assembly The main task is to measure the influence of the radiation on the parameters of MOS devices at room and low temperature. The test structures used in those experiments were manufactured in 90nm and 130nm IBM technology. The 2x2 mm 2 “SEULogic” consists of two main parts: Shunt regulator for the serial powering scheme, Purely digital part which will be used for testing 130 nm design kit digital flow.

14. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 TWEPP-09 Topical Workshop on Electronics for Particle Physics “An integrated DC-DC step-up charge pump and step-down converter in 130 nm technology” (poster + paper) ATLAS–CMS Power Working Group “Design of on-chip switched capacitor converters” (presentation) TWEPP-10 Topical Workshop on Electronics for Particle Physics “Switched capacitor DC-DC converter ASICs for the upgraded LHC trackers” (presentation + paper) … and many other presentations during the official and unofficial meetings Participation in organizing the TDAQ School in Rome 2011 Organizing the paper reviews for TWEPP-10 Dissemination

15. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Impact & plans for the future My work within the WP3 is related to the topic of my PhD. An increase in my technical knowledge, professional skills and experience in microelectronics and high energy physics. Better skills with time management from working on several projects in parallel. Improvement with my social skill (organizing events, giving presentations) in a multi-national environment. Numerous technical and non-technical courses will help me to improve my job-skills for the future.

16. WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Thank you!