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Modified OSI Architecture for Low-Power Wireless Networks

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Presentation on theme: "Modified OSI Architecture for Low-Power Wireless Networks"— Presentation transcript:

1 Modified OSI Architecture for Low-Power Wireless Networks
Jay Bruso Mike Matranga

2 Agenda Review Thesis Physical Layer Fundamentals
Modulation / Demodulation Front-end circuitry PLL Data Link Layer Fundamentals Methods of data processing Proposed solution Project objectives

3 Thesis Proposal Applying standard OSI model to WSNs results in poor energy utilization Physical Layer lacks knowledge of data being sent across the channel Packet Format, Length, Data Type, etc. Data Link Layer forced to do work that could be done in Physical Layer Cost of performing work in Data Link Layer will be more expensive than equivalent function in Physical Layer For energy optimization Physical Layer needs to be smarter

4 Transceiver Block Diagram

5 Modulation to the CC2400 Frequency Shift Keying
The CC2400 uses FSK/GFSK

6 Receiver Front End Review Part 1
MIXER RF AMP RF IN RF IN * A IF OUT LO IN RF amplifier: amplifies a weak RF signal coming out of the antenna. Mixer: together with the local oscillator downconverts the RF signal to the IF frequency band.

7 Receiver Front End Review Part 2
Power Divider Frequency Synthesizer Control Logic To Mixers N, R from TXCR Control Logic SPI from Microcontroller 90 CLK to Microcontroller Reference Clock Frequency Synthesizer is a PLL

8 Phase Locked Loop N and R are programmed by the microcontroller,
and stored into registers in the transceiver.

9 Receiver Front End Review Part 3
Filter AGC ADC RSSI CLK Bandpass Filter: Removes out of band signals Automatic Gain Control (AGC): Adjusts the IF amplifier gain according to the signal level (to keep the average signal amplitude almost constant) Analog to Digital Converter : Digitizes the analog signal

10 Demodulation V1 V2 PLL Tracking Voltage FSK Signal In 1
This data is digitally filtered & buffered. Once the signal is recognized, the outputs CLK, SOM, RXDATA are sent to the Microcontroller

11 Typical WSN Block Diagram
Controller configures XCVR for receive mode XCVR notifies controller with SOM signal Controller processes incoming data Controller disables XCVR when done

12 Methods of Data Processing
Method 1, Polling for Bytes Controller continuously checks for new data received Checks if message is complete, and if so, powers off transceiver Most inefficient because CPU always running

13 Methods of Data Processing
Method 2, Interrupt Driven Controller interrupted after every byte is received Checks if message is complete, and if so, powers off transceiver More inefficient than polling because CPU can go to sleep (enter low-power) mode in between receiving data

14 Methods of Data Processing
Method 3, DMA Controller interrupted after a block of data is received More efficient than interrupt because CPU is woken up less often More difficult than interrupt because size of DMA transfer must be predetermined Difficult when receiving packets of unknown length Usually results in setting DMA transfer size small (5 bytes, etc)

15 Data Processing Comparison
Method Response Time Power Consumption Polling High Interrupt Low DMA Med

16 Where is Power Wasted Finite amount of CPU time required to process and detect end of message Finite amount of time required for CPU to disable power to XCVR Wasted Power = (Tproc+Tpwroff)*Ireceive

17 What Can Be Done Provide physical layer with intelligence for detecting EOM condition Packet Format Message length encoding Offset into data stream where to find length Character frame encoding Provide register for escape character (0x80) Provide register for EOM character (0xFE) No Data Received Timer Automatically powers off if no message received within programmed time interval

18 Focus of Project Quantify how much power is really being wasted
Design and implement a small WSN Measure power wasted Various protocols Various processing methods Various data rates MSP430 as controller ChipCon CC2400 as transceiver

19 Focus of Project (cont’d)
Quantify how much power can be saved if physical layer were smarter Implement proposed solutions in small CPLD (XPLA3 … XCR3512XL) Repeat previous tests and measure power saved Various protocols Various processing methods Various data rates

20 Project Model Add DLL functionality into PL using CPLD
Demonstrate improved performance Quantify energy savings Report results


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