1. 1 姓名 : 李國彰 指導教授 : 林志明老師 A 1v 2.4GHz CMOS POWER AMPLIFIER WITH INTEGRATED DIODE LINEARIZER ( The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, December 6-9,2004 )

2. 2 Outline Abstract Introduction Power amplifier design Simulation result Layout consideration Conclusions Reference

3. 3 Abstract Low voltage, integrated diode linearization For 2.4GHz Bluetooth UMC 0.18 μ m CMOS technology 20dBm output power PAE 51% S12 -27.5dB

4. 4 Introduction Bluetooth -class 1 ( 20dBm ) -class 2 ( 4 dBm ) -class 3 ( 0 dBm ) For extending the life of the battery, low power design is important

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6. 6 Power Amplifier design Cascode->folded-cascode M1, M2 are biased at class A Two LC-tanks are added to resonate At the carrier frequency, the tank exhibits high impedances M2 is an isolation

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8. 8 Power Amplifier design At dc, the inductor->low resistance At RF resonance, LC-tanks->high R The operation of the folded cascode PA is limited by Q The gain is reduced by To minimize the loss, CG should meet

9. 9 Power Amplifier design The integrated diode linearizer improve the Gain compression and phase distortion The gate bias dc level of M1 with linearizer has less variation as P in ↑

10. 10 Simulation result Simulated with UMC CMOS 0.18 μ m RF model by using the Agilent ADS The parasitic effects of M1, M2, M3 have been considered It meets the class 1 transmission requirements for Bluetooth application

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15. 15 Layout consideration The interconnection among the metal line To reduce the mutual inductance The chip area is 0.76mm 2

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18. 18 Conclusions A Class 1 Bluetooth RF power amplifier with diode linearization technique has been designed in UMC 0.18μm CMOS technology 20dBm, PAE 51% at 2.4GHz S12 -27.5dB Low voltage and good linearity

19. 19 References

20. 20 References

21. 21 Q &A