1. Controls Interface to Electronics Boards Credit-Card PC and Local Control bus Beat Jost Cern EP

2. Beat Jost, Cern 2 FE/Controls/DAQ Workshop Outline qIntroduction qGoal qCurrent Ideas for Solution qDiscussion and Conclusion

3. Beat Jost, Cern 3 FE/Controls/DAQ Workshop Problem Introduction Classical Way of controlling electronics in HEP Pros: ãUniversally available ãsimple? slave interface ãin the past bus could also be used for DAQ Cons: ãexpensive CPUs (very small market) ãexpensive crates ãexpensive slave I/Fs Crate Controller (CPU) Electronics Modules Parallel Bus (VME, Fastbus,…) Ethernet WS

4. Beat Jost, Cern 4 FE/Controls/DAQ Workshop Assumption for the Following qThe vast majority of the electronics boards are home-made qCrate bus is not used for moving the physics data in LHC experiments, because ã(at least) at higher levels of the readout systems, performance is insufficient ãtrigger rate too high for processor intervention on per event basis qCrate bus is only used for control and monitoring ãfor this purpose a “high performance” bus is not needed ãfor this purpose a parallel bus is not desired for reliability reasons åOne participant on the bus can prevent bus accesses even if it’s not involved åmakes diagnostics more difficult qHence ãA more reliable and perhaps even more cost effective alternative is desired. qBy the way: Crates are useless for dispersed individual boards

5. Beat Jost, Cern 5 FE/Controls/DAQ Workshop Goals qGet rid of parallel busses for controls qFind a cheaper solution for ãper-board controls interface (slave) ãper crate intelligence, by taking it out of the crate formfactor åUse commodity items ãCrates (no parallel bus needed anymore) åReduce crates to –Mechanical support (“Anti-Gravity device”) –Power Bus (could be arguable) –Cooling (Fantray) qTake advantage of large market (low price) qProvide a common controls interface for ALL electronics boards in LHCb

6. Beat Jost, Cern 6 FE/Controls/DAQ Workshop Current Ideas Replace By Electronics Modules Field-Bus e.g. Ethernet Power Bus Or even better WS Electronics Modules Field-Bus e.g. Ethernet Power Bus Network Switch/HUB WS

7. Beat Jost, Cern 7 FE/Controls/DAQ Workshop Electronics Board Architecture The architecture of an electronics board could look like this: Standard Application Specific Power Connectors Field-bus I/O FPGAs Regs E.g. 9Ux400mm LUTs DSPs Reset WS Note: No other interface!! Configuration Monitoring Diagnostics Debugging... ADCs TDCs Etc... Controls Interface I2CI2C JTAG (simple)Parallel Bus PCI Bus

8. Beat Jost, Cern 8 FE/Controls/DAQ Workshop Requirements for On-Board ECS Interface qSufficient b andwidth into each board (10-100 Mb/s) qCost per board must be low åUniform approach for “all” electronics (volume) ãfor Ethernet the cost of a switch or hub port has to be taken into account å10 Mb/s hub port ~30 SFr. (today) å100 Mb/s switch port ~80 SFr. (today) åCan be mixed!! qMechanical ãminimal height (thickness) ãminimal surface qSoftware support ãLow-level access libraries from WS to board components ãTools supporting the programming of a CPU (if present) on the interface qReset of ECS interface without disturbing the operation of the rest of the electronics on board

9. Beat Jost, Cern 9 FE/Controls/DAQ Workshop Possible Solutions under Study qCredit-card PCs (e.g. smartModules) qFireWire Complete PCs!! Typically based on Intel compatible microcontroller plus glue logic, could replace partially PC/104 in the future. CPU Mem Periphery DRAM Bus Keyboard,Comm, Screen, Disk, Floppy, LCD,... ISA,PCI,I 2 C (Master),JTAG (Master) Ethernet Parallel Bus JTAG I 2 C Firewire FW-XX qWe also looked at PC/104, but it doesn’t seem suitable mechanically

10. Beat Jost, Cern 10 FE/Controls/DAQ Workshop Immediate Plans qFor SmartModules ãacquire one evaluation kit and one “bare” module åEvaluation Kit with 486 acquired, porting currently Linux to it åFinal (586-based) module not yet available ãlearn how to program the processor using the evaluation kit ãbuild an evaluation board with FPGA(s), memory, registers, LEDs, to study how to use the modules and whether they are suited for our application åbeing designed now. Ready in ~3 months? ãShould be able to give guidelines for designers by November qFireWire ãtry to understand the availability of interfaces/bridges åfor example: we know that there exists a Firewire to IDE chip. Can this be used? åSimilar (or same) evaluation board as above to prove usability

11. Beat Jost, Cern 11 FE/Controls/DAQ Workshop SmartModule Evaluation Board 40 MHz Clk Memory (>2 MB) Registers FPGA (Altera) Analog Input Push Button (Run Acquisition) HW JTAG Integrator/Shaper FPGA (Lucent) Parallel Bus 32 Address lines/ 32 Data lines (non- multiplexed) Interrupt (DMA) Running Clk VME Slave Interface VME/ Glue Logic Inhibit VMEClk Front-PanelLEDsfor: Running NOT Running some bits driven from registers Ethernet Traffic Data Latch MIC Delay chip High precision ADC (12 Bits) Parallel Port JTAG (SW JTAG) SmartModule PCI RJ45 Connector PLX 9080 Ethernet JTAG Glue Logic I 2 C

12. Beat Jost, Cern 12 FE/Controls/DAQ Workshop Based on PLX PCI 9080 chip (see also http://lhcb.cern.ch/computing/controls/pdf/9080db-106.pdf ) Goal: It should be easy to interface to components to local bus q32 bit address q32 bit data + Byte Parity qControl lines (address strobe, R/W, Byte enable, etc.) qLocal bus clock frequency 0-40 MHz -> allows to run bus synchronous with LHC Clock qlocal bus can be Little or Big Endian qOne interrupt line from local bus to PCI -> might need external interrupt register/generator qnot terribly fast: ã8.3 MB/sec PCI reading from local bus ã8.8 MB/sec PCI writing to local bus qPCI DMAs translated into local bus bursts Local Bus Characteristics } Non-multiplexed } Single Cycle from timing diagrams

13. Beat Jost, Cern 13 FE/Controls/DAQ Workshop Other Issues qAre the proposed interfaces (I 2 C, JTAG, parallel bus, (PCI)) acceptable and sufficient? qHardware configuration, e.g. amount of memory required qCost qInterference with on-board analog electronics qReset of controls interface while taking data (SUE recovery) qFinal Implementation: Glue logic on separate board or integrated on motherboard? Controls Interface I2CI2C JTAG Parallel Bus PCI Bus Credit-Card PC Glue Logic

14. Beat Jost, Cern 14 FE/Controls/DAQ Workshop Pros and Cons qPros ãonly point-to-point connections ãflexible concerning association between controls WS and electronics board (scalability) ãprogrammable element on board allows extensive self-test and diagnostics ãallows to use (design) cheap crates ãtest-benches and repair stands are very simple and cheap: just need a PC or terminal and an Ethernet cable and a power supply qCons ãpotentially cost (even though it seems that e.g. smartModules are competitive with VME) ãdifficult to mix in one crate commercial (VME-based?) modules ãcurrently only few vendors (issue is more the pin-out), however market is growing, Effort going on to standardize pin-out.

15. Beat Jost, Cern 15 FE/Controls/DAQ Workshop Conclusions qWe are studying alternatives to crate-based solutions (VME) to be used for the control, configuration and monitoring of board-level electronics qOur Goal is to find a solution that is, compared to VME, ãmore flexible ãmore reliable ãnot more expensive (actually much cheaper if cheap crates are used) qCredit-Card PCs could be a viable solution qThe results of the evaluation board will make us know more

16. Beat Jost, Cern 16 FE/Controls/DAQ Workshop smartModule vs. VME Cost Analysis