1. H. Chan; Mohawk College1 NUMERICAL EXAMPLES FOR EE213 Part II 1) Determine the r’ e of a transistor that is operating with I E = 5 mA. r’ e = 25 mV/ I E = 25 mV/ 5 mA = 5  2) For the CE amplifier, R 1 = 33 k , R 2 = 8.2 k , R C = 2.7 k , R E = 680 ,  DC = 100, and V CC = +15 V. Calculate: V B, I C, and V CE. R IN(base) =  DC R E = 100 x 680 = 68 k (which is not >> R 2 ) V B = (R 2 //R IN(base) )V CC /(R 1 +R 2 //R IN(base) ) = (8.2//68)x15/(33+8.2//68) = 7.32 x 15 / (33 + 7.32) = 2.72 V V E = V B - V BE = 2.72 - 0.7 = 2.02 V I C  I E = V E /R E = 2.02 / 680 = 2.97 mA V C = V CC - I C R C = 15 - 2.97 mA x 2.7 k = 6.98 V V CE = V C - V E = 6.98 - 2.02 = 4.96 V

2. H. Chan; Mohawk College2 3) For the circuit in e.g. 2, what are R in(tot), R out, and A v if  ac = 120, and R L = 1 k  ? R in(base) =  ac r’ e = 120 x 25 mV / I E = 120 x 25 / 2.97 = 1.01 k  R in(tot) = R 1 //R 2 //R in(base) = 33k//8.2k//1.01k = 875.4  R out = R C //R L = 2.7k // 1k = 729.7  A v = -R c / r’ e = -729.7 / (25/2.97) = -86.7 4) If a 50 mV, 200  source is connected to the circuit in e.g. 2 & 3, determine: V b, A’ v, and V out V b = R in(tot) V s /(R s +R in(tot) ) = 875.4 x 50 mV/(200+875.4) = 40.7 mV A’ v = R in(tot) A v /(R s +R in(tot) ) = 875.4 x (-86.7)/(200+875.4) = -70.6 V out = A’ v V in or A v V b = -70.6 x 50 mV = -3.53 V 5) What is the minimum value of C E in e.g. 2 if the amplifier operates over a frequency range from 500 Hz to 100 kHz. X C  R E /10 = 68  ;  C E  1/(2  f min X C ) = 4.68  F

3. H. Chan; Mohawk College3 6) For the swamped CE amplifier with R 1 = 10 k , R 2 = 2 k , R C = 4.7 k , R E1 = 150 , R E2 = 470 , V CC = 12 V, and  DC = 110,  ac = 125, calculate: A v, and R in(tot) R IN(base) =  DC (R E1 +R E2 ) = 110 x (150+470) = 68.2 k >> R 2 V B  R 2 V CC /(R 1 +R 2 ) = 2 x 12 / (10 + 2) = 2 V V E = V B - 0.7 = 1.3 V; I E = V E / (R E1 +R E2 ) = 2.1 mA r’ e = 25 mV/ I E = 25 / 2.1 = 11.9  (which is << R E1 ) A v  -R C / R E1 = -4.7k / 150 = -31.3 R in(base) =  ac (r’ e +R E1 ) = 125 x (11.9 + 150) = 20.24 k  R in(tot) = R 1 //R 2 //R in(base) = 10k//2k//20.24k = 1.54 k  7) If a 0.5 V, 300  source is connected to the circuit in e.g. 6, and R L = 1 k , find A’ v. A v = -(R C //R L ) / R E1 = -4.7k//1k / 150 = -5.5 A’ v = R in(tot) A v /(R in(tot) +R s ) = 1.54k x (-5.5)/(1.54k+300) = -4.6

4. H. Chan; Mohawk College4 8) For the emitter-follower amplifier, R 1 = 27 k , R 2 = 10 k , R E = 1.2 k , R L = 2 k ,  DC = 120, V CC = 15 V. Find: I C, and V CE. V B  R 2 V CC /(R 1 +R 2 ) = 10 x 15 /(27+10) = 4.05 V V E = V B - 0.7 = 4.05 - 0.7 = 3.35 V; I C  V E /R E = 3.35/1.2k = 2.8 mA V CE = V C - V E = V CC - V E = 15 - 3.35 = 11.65 V 9) If  ac = 85 for e.g. 8, and a 2 V, 300  source is connected to the input, determine: R in(tot), R out, A v, and A i. r’ e = 25 mV/ I E = 25 / 2.8 = 8.93  ; R e = R E //R L = 1.2k//2k = 750  R in(base) =  ac (r’ e +R e ) = 85 x (8.93+750) = 64.5 k  R in(tot) = R 1 //R 2 //R in(base) = 27k//10k//64.5k = 6.56 k  R out  (R s /  ac ) //R e = (300/85) // 750 = 3.5  A v = R e /(r’ e +R e ) = 750/(8.93+750) = 0.988 I e = V out /R e = A v V b /R e = A v R in(tot) V in /((R s +R in(tot) )R e ) = 2.52 mA I in = V in /R in(tot) = 2/6.56k = 0.3 mA;  A i = I e /I in = 2.52 / 0.3 = 8.4

5. H. Chan; Mohawk College5 10) For e.g. 8 & 9, if the transistor is replaced by a Darlington pair where  DC =  ac = 100, and R E = R L = 8 , find: A v, and R in(tot). R IN(base) =  2 DC R E = 100 2 x 8 = 80 k  V B = (R 2 //R IN(base) V CC ) / (R 1 +R 2 //R IN(base) ) = 3.72 V V E2 = V B -2V BE = 3.72 - 2x0.7 = 3.02V; I E = V E2 /R E = 377.5 mA r’ e = 25 mV/I E = 25 / 377.5 = 66.2 m  ; R e = R E //R L = 8//8 = 4  A v = R e /(R e +r’ e ) = 0.984 R in(base) =  2 ac (r’ e +  R e ) = 100 2 x (0.0662 + 4) = 40.66 k  11) Find R in, A v, and A p for a CB amplifier with R 1 = 68 k , R 2 = 15 k , R C = 3.3 k , R E = 1.5 k , R L = 5 k , V CC = 24 V,  DC = 180. V B  R 2 V CC / (R 1 +R 2 ) = 4.34 V; V E = V B - 0.7 = 3.64 V I E = V E /R E = 2.43 mA; R in  r’ e = 25 mV/I E = 10.3  A v = R c /r’ e = (R C //R L )/r’ e = (3.3k//5k) / 10.3 = 193 A p  A v = 193

6. H. Chan; Mohawk College6 12) A 30 dB amplifier is cascaded with a 20 dB amplifier. Calculate their overall gain in dB. What would be the output voltage at the 2nd amplifier if the input voltage to the 1st amplifier is 20 mV? A vT = 30 + 20 = 50 dB; the gain in non-dB value is 316.2 V out = A vT V in = 316.2 x 20 mV = 6.32 V 13) Two capacitively-coupled CE amplifier stages have the following components: R 1 = R 5 = 56 k , R 2 = R 6 = 12 k , R 3 = R 7 = 3.6 k , R 4 = R 8 = 1 k , R L = 2 k , V CC = 20 V,  DC =  ac = 140 for Q 1 and Q 2. Find A vT DC voltages and currents for both stages are the same: V B  R 2 V CC /(R 1 +R 2 ) = 3.53 V; V E = V B - 0.7 = 2.83 V I E = V E /R 4 = 2.83 mA; r’ e = 25 mV/I E = 8.83  R c1 = R 3 //R 5 //R 6 //R in(base2) = 3.6k//56k//12k//(140x8.83) = 841.8  A v1 = R c1 /r’ e = 95.3; A v2 = R c2 /r’ e = (R 7 //R L )/r’ e = 145.6 A vT = A v1 A v2 = 13,876 or 82.85 dB

7. H. Chan; Mohawk College7 14) For a CE amplifier with R 1 = 12 k , R 2 = 5.6 k , R C = 1.2 k , R E = 560 , R L = 1.8 k , V CC = 12 V, and  DC =  ac = 110, draw the dc and ac load lines. Obtain all the important parameters for the lines. V BQ  R 2 V CC /(R 1 +R 2 ) = 3.82 V; V EQ = V BQ - 0.7 = 3.12 V I CQ  I EQ = V EQ /R E = 3.12 / 560 = 5.57 mA V CQ = V CC - I CQ R C = 12 - 5.57 mA x 1.2 k = 5.32 V V CEQ = V CQ - V EQ = 2.2 V I C(sat) = V CC /(R C +R E ) = 6.82 mA V CE(cutoff) = V CC = 12 V R c = R C //R L = 720  V ce(cutoff) = V CEQ + I CQ R c = 6.21 V I c(sat) = I CQ +V CEQ /R c = 8.63 mA Q I C (mA) 8.63 6.82 V CE 12 V 6.21 V 0

8. H. Chan; Mohawk College8 15) Determine the value of R E so that the Q-point in e.g. 14 is approximately centred on the ac load line At mid-point of the ac load line, I CQ = I c(sat) /2 = 8.63/2 = 4.32 mA and V CEQ = V ce(cutoff) /2 = 6.21/2 = 3.11 V Since V CEQ = V CC - I CQ (R C +R E )  R E = (V CC - V CEQ - I CQ R C ) / I CQ = 858  16) Calculate a) the min. transistor power rating, b) the max.ac output power without distortion, c) the efficiency for e.g. 14. P D(min) = P DQ = V CEQ I CQ = 2.2 x 5.57 mA = 12.3 mW Since the Q-point is closer to saturation, the max. voltage swing is V CEQ, and the corresponding max. current swing is V CEQ /R c Max. P out = V out(rms) I out(rms) = 0.707V CEQ (0.707V CEQ /R c ) = 3.36 mW P DC = V CC I CQ = 12 x 5.57 mA = 66.8 mA So,  = P out / P DC = 3.36 / 66.8 = 0.05 or 5%

9. H. Chan; Mohawk College9 17) Determine the dc voltages at the bases and emitters of the matched complementary transistors Q 1 and Q 2 of the class AB amplifier with R 1 = R 2 = 120 , and V CC = 24 V. Also determine V CEQ for each transistor. Assume V D1 = V D2 = V BE = 0.7 V The total current through R 1, D 1, D 2, and R 2 is I T = (V CC -V D1 -V D2 )/(R 1 +R 2 ) = (24-0.7-0.7)/(120+120) = 94.2 mA V B1 = V CC - I T R 1 = 24 - 94.2 mA x 120 = 12.7 V V B2 = V B1 - V D1 - V D2 = 12.7 - 0.7 - 0.7 = 11.3 V V E1 = V E2 = V B1 - V BE = 12.7 - 0.7 = 12 V V CEQ1 = V CEQ2 = V CC / 2 = 24/2 = 12 V 18) If R L = 8 ,  ac = 120, and r’ e = 5  for e.g. 17, find: I out(pk) and R in. I out(pk) = I c(sat) = V CEQ / R L = 24/8 = 3 A R in =  ac (r’ e + R L ) = 120 (5 + 8) = 1.56 k 

10. H. Chan; Mohawk College10 19) Find the max. P out, the dc input power, and  for e.g. 17 & 18. Max. P out = 0.25V CC I c(sat) = 0.25 x 24 x 3 = 18 W P DC = V CC I c(sat) /  = 24 x 3 /  = 22.92 W  = P out / P DC = 18 / 22.92 = 0.785 or 78.5% 20) If the circuit in e.g. 17 & 18 is replaced by a Darlington class AB push-pull amplifier with  ac1 =  ac2 = 55, find R in. R in =  tot (r’ e + R L ) = 55 2 (5 + 8) = 39.3 k  21) A tuned class C amplifier has a V CC = 12 V, V CE(sat) = 0.2 V, I C(sat) = 120 mA, R c = 80 , and a duty cycle of 15%, determine: P D(avg), and efficiency assuming max. output power operation. P D(avg) = (t ON /T)V CE(sat) I C(sat) = 0.15 x 0.2 x 120 mA = 3.6 mW Max. P out = 0.5V 2 CC / R c = 0.5 x 12 2 / 80 = 900 mW  = P out / (P out + P D(avg) ) = 900 / (900 + 3.6) = 0.996 or 99.6 %

11. H. Chan; Mohawk College11 22) If V GS(off) = -5 V, I DSS = 10 mA, and R D = 1 k  what is the min. value of V DD to put the JFET in constant-current region of operation. V DD RDRD IDID Since V GS = 0, V GS(off) = -V P = -5, I.e. V P = 5 V, and I D = I DSS = 10 mA So, min. V DS = V P = 5 V Min. V DD = V D(min) + I D R D = 5 + 10 mA x 1k = 15 V 23) What is the value of g m0 for the JFET in e.g. 22? g m0 = 2I DSS / |V GS(off) | = 2 x 10 mA / 5 = 4 mS 24) Determine I D, g m, and R IN for e.g. 22 when V GS = -2 V, and I GSS = -0.2 nA. I D = I DSS (1 - V GS /V GS(off) ) 2 = 10 (1 - (-2/-5)) 2 = 3.6 mA g m = g m0 (1-V GS /V GS(off) ) = 4 mS (1 - (-2/-5)) = 2.4 mS R IN = |V GS /I GSS | = 2/0.2 nA = 10 G 

12. H. Chan; Mohawk College12 25) Find V DS and V GS for the circuit when R G = 10 M , R D = 1.5 k , R S = 330 , V DD = 20 V, and I D = 4 mA. +V DD RDRD RSRS RGRG V G = 0 V S = I D R S = 4 mA x 330 = 1.32 V V D = V DD - I D R D = 20 - 4 mA x 1.5k = 14 V V DS = V D - V S = 14 - 1.32 = 12.68 V V GS = V G - V S = 0 - 1,32 = -1.32 V 26) Find R S to self-bias the JFET circuit where I DSS = 15 mA, V GS(off) = -7 V, and V GS is to be -2.5 V. I D = I DSS (1-V GS /V GS(off) ) 2 = 15 mA(1-(-2.5/-7)) 2 = 6.2 mA R S = |V GS /I D | = 2.5 / 6.2 mA = 403  27) Determine R D and R S for midpoint bias where I DSS = 15 mA, V DD = 20 V, and V GS(off) = -7 V. For midpoint bias, V D = V DD /2 = 10 V, and I D = I DSS /2 = 7.5 mA

13. H. Chan; Mohawk College13 27) cont’d V GS = V GS(off) /3.4 = - 7/3.4 = -2.06 V So, R S = |V GS /I D | = 2.06 / 7.5 mA = 275  R D = (V DD - V D ) / I D = (20 - 10) / 7.5 mA = 1.33 k  28) Find I D and V GS for the JFET circuit with voltage-divider bias given R 1 = 5.6 M , R 2 = 1 M , R D = 4.7 k , R S = 2.7 k , V DD = 15 V, and V D = 8 V. I D = (V DD - V D ) / R D = (15 - 8) / 2.7k = 2.6 mA V S = I D R S = 2.6 mA x 2.7 k = 7 V V G = R 2 V DD /(R ! +R 2 ) = 1 x 15/(5.6 + 1) = 2.27 V V GS = V G - V S = 2.27 - 7 = - 4.63 V 29) A D-MOSFET has V GS(off) = -6 V, I DSS = 14 mA and V GS = 2 V. Find I D. What mode is it operating in? I D = I DSS (1-V GS /V GS(off) ) 2 = 14(1- 2/(-6)) 2 = 24.9 mA Enhancement mode.

14. H. Chan; Mohawk College14 30) For an E-MOSFET, I D = 400 mA at V GS = 8 V, and V GS(th) 1 V. Determine I D for V GS = 4 V. K = I D / (V GS - V GS(th) ) 2 = 400 mA /(8 - 1) 2 = 8.16 mA/V 2 I D = K(V GS - V GS(th) ) 2 = 8.16 mA (4 - 1) 2 = 73.4 mA 31) Determine V DS for a D-MOSFET with zero-bias, R D = 910 , V DD = 20 V, V GS(of) = -6 V, and I DSS = 15 mA. For zero-bias, I D = I DSS = 15 mA V DS = V DD - I D R D = 20 - 15 mA x 910 = 6.35 V 32) If the E-MOSFET from e.g. 30 is used in a circuit with voltage- divider bias where R 1 = 200 k , R 2 =  40 k , R D = 180 , and V DD = 24 V, determine V GS and V DS. V GS = R 2 V DD / (R 1 +R 2 ) = 40 x 24 / (200 + 40) = 4 V As found in e.g 30, when V GS = 4 V, I D = 73.4 mA Therefore, V DS = V DD - I D R D = 24 - 73.4 mA x 180 = 10.8 V

15. H. Chan; Mohawk College15 33) Determine I D for an E-MOSFET in a circuit with drain-feedback bias, R G = 10 M , R D = 2.2 k , V GS = 5 V, and V DD = 20 V. With drain-feedback bias, V DS = V GS = 5 V I D = (V DD - V DS ) / R D = (20 - 5) / 2.2 k = 6.82 mA 34) The values for a CS self-biased JFET amplifier are: R G = 10 M  R D = 1.2 k , R S = 680 , I DSS = 10 mA, V GS(off) = -6 V, V DD = 15 V, and V in = 2 V. Assuming midpoint biasing, find: V DS and V out. For midpoint biasing, I D = I DSS / 2 = 10 /2 = 5 mA V DS = V DD - I D (R D +R S ) = 15 - 5 mA(1.2k+680) = 5.6 V V GS = - I D R S = - 5 mA x 680 = - 3.4 V g m0 = 2I DSS / |V GS(off) | = 2 x 10 mA/6 = 3333  S g m = g m0 (1-V GS /V GS(off) ) = 3333  S(1- 3.4/6) = 1444.3  S A v = -g m R D = -1444.3  S x 1.2 k = -1.733 V out = A v V in = -1.733 x 2 = -3.5 V

16. H. Chan; Mohawk College16 35) Determine the output voltage for e.g. 34 if the output is connected to a load, R L = 1 k  R d = R D // R L = 1.2k // 1k = 545.5  V out = -g m R d V in = - 1444.3  S x 545.5 x 2 = -1.58 V 36) With reference to the zero-biased CS D-MOSFET amplifier, R G = 10 M , R D = 100 , V DD = 20 V, I DSS = 100 mA, g m = 100 mS, R L = 1 k , and V in = 600 mV. Determine: V D and V out. Since it is zero-biased operation, I D = I DSS = 100 mA V D = V DD - I D R D = 20 - 100 mA x 100 = 10 V V out = -g m R d V in = -100 mS x 100//1k x 600 mV = -5.45 V 37) For the amplifier in e.g. 34, if I GSS = -10 nA at V GS = -4 V, what is R in ? R IN(gate) = |V GS /I DSS | = 4/10nA = 400 M  R in = R G // R IN(gate) = 10 M // 400M = 9.76 M 

17. H. Chan; Mohawk College17 38) A voltage-divider biased CS E-MOSFET amplifier has R 1 = 45 k, R 2 = 10 k, R D = 2.7 k, V DD = 12 V, R L = 10 k, I D(on) = 150 mA at V GS = 3.5 V, V GS(th) = 2 V, g m = 20 mS, and V in = 100 mV. Find: V DS and V out. K = I D(on) / (V GS - V GS(th) ) 2 = 150 mA / (3.5 - 2) 2 = 66.7 mA/V 2 V GS = R 2 V DD /(R 1 +R 2 ) = 10 x 12 / (45 + 10) = 2.18 V I D = K(V GS - V GS(th) ) 2 = 66.7 (2.18 - 2) 2 = 2.2 mA V DS = V DD - I D R D = 12 - 2.2 mA x 2.7k = 6.05 V V out = -g m R d V in = -20 mS x 2.7k//10k x 100 mV = -4.25 V 39) A JFET is connected as a CD amplifier with self bias, R G = 10 M, R S = 5 k, R L = 10 k, V DD = 15 V, V in = 5 V, and g m = 2 mS. Find: A v and V out. A v = g m R s / (1+g m R s ) = 2 mS x 5k//10k (1+2 mS x 5k//10k) = 0.87 V out = A v V in = 0.87 x 5 = 4.35 V

18. H. Chan; Mohawk College18 40) A JFET connected as a zero-biased CG amplifier has R D = 5 k, R S = 2.7 k, V DD = 15 V, R L = 5 k, V in = 0.2 V and g m = 3 mS. Find: V out and R in. V out = g m R d V in = 3 mS x 5k//5k x 0.2 = 1.5 V R in = R in(source) // R S = (1/g m ) // 2.7k = 297  41) An amplifier has an output of 3 V across a load of 100  when the input is 0.2 V. Express the gain in dB, and the output in dBm. A v = 20log(V out /V in ) = 20 x log (3/0.2) = 23.5 dB P out = V 2 out / R L = 3 2 / 100 = 90 mW = 10log(90/1) = 19.5 dBm 42) An input of 0.1 V is applied to a 25 dB amplifier. Find V out. A v = 25 dB = antilog (25/20) = 17.78 V out = A v V in = 17.78 x 0.1 = 1.78 V 43) What is f cl for an amplifier with R in = 3 k, and C 1 = 1  F? f cl = 1/(2  R in C 1 ) = 1/(2  x 3k x 1  ) = 53.1 Hz

19. H. Chan; Mohawk College19 44) A v(mid) of an amplifier is 50 and the input RC circuit has an f cl = 500 Hz. Determine the voltage gain and phase shift at 50 Hz. Since 50 Hz is one decade below f cl, A v is 20 dB less than A v(mid) i.e. A v = A v(mid) (dB) - 20 dB or A v(mid) / (antilog (20/20)) = 5 A decade below f c, X c = 10R in, so  = tan -1 (X c /R in ) = tan -1 (10) = 84.3 o 45) The output RC circuit of a CE amplifier consists of R C = 5 k, R L = 2 k, and C 3 = 1  F. Determine: f cl, and A v at f cl when A v(mid) = 20. f cl = 1/(2  (R C +R L ) C 3 ) = 1/(2  (5k+2k) 1  ) = 22.7 Hz At f cl, A v = 0.707 A v(mid) = 0.707 x 20 = 14.1 46) Find f cl of the bypass RC circuit where R E = 560 , C E = 5  F, R 1 = 47 k, R 2 = 10 k, R s = 60 , r’ e = 15 , and  ac = 120. R th = R 1 //R 2 //R s = 47k//10k//60 = 59.6  R in(emitter) = r’ e +R th /  ac = 15 + 59.6 / 120 = 15.5  f cl = 1/(2  (R in(emitter) // R E ) C E ) = 1/(2  (15.5//560) 5  ) = 2.1 kHz

20. H. Chan; Mohawk College20 47) For the circuit on the left, R 1 = 33k, R 2 = 6.8 k, R C = 2 k, R E = 680 , R L = 5 k, C bc = 4 pF, C be = 8 pF, V CC = 12 V,  ac = 100. Find: C in(Miller) and C out(Miller). +V CC C1C1 R1R1 R2R2 RCRC RERE C3C3 RLRL C2C2 V in V out V B = R 2 V CC /(R 1 +R 2 ) = 2.05 I E = V E /R E = (V B -0.7)/R E = 1.99 mA r’ e = 25 mV/I E = 12.6  A v = -R c /r’ e = -(R C //R L )/r’ e = -113.4 C in(Miller) = C bc ( |A v | +1) = 457.6 pF C out(Mileer) = C bc ( |A v | +1) / |A v |  4 pF 48) Determine the upper critical frequency of the input RC circuit for e.g. 47 if the input source resistance is R s = 100 . R in(tot) = R s //R 1 //R 2 //  ac r’ e = 100//33k//6.8k//(100x12.6) = 91.1  f cu = 1/(2  R in(tot) C in(tot) ) = 1/(2  x 91.1 x 465.6 pF) = 3.75 MHz C in(tot) = C in(Miller) + C be = 457.6 + 8 = 465.6 pF

21. H. Chan; Mohawk College21 49) Determine the f cu of the output RC circuit in e.g. 47. f cu = 1/(2  R c C out(Miller) )  1/(2  x 2k//5k x 4 pF) = 27.9 MHz 50) What are the bandwidth and gain bandwidth product for the amplifier circuit in e.g. 47 assuming f cl << f cu ? BW  f cu = 3.75 MHz f T = |A v(mid) | x BW = 113.4 x 3.75 MHz = 425.3 MHz 51) What would be the approximate gain of the amplifier in e.g. 47 at a frequency of 50 MHz? |A’ v | = f T / BW’ = 425.3 / 50 = 85.1 52) Determine the total low-frequency response of a JFET amplifier with R G = 10 M , R D = R L = 10 k, V GS = -8 V, C 1 = C 2 = 0.05  F,and I GSS = 40 nA. R in(gate) = |V GS / I DSS | = 8 / 40 nA = 200 M  f cl(input) = 1/(2  R in(gate) //R G )C 1 ) = 0.33 Hz f cl(output) = 1/(2  (R D +R L )C 2 ) = 159.2

22. H. Chan; Mohawk College22 53) A self-biased CS JFET amplifier has R G = 10 M , R D = 5 k, R S = 1k, R L = 10 k, R s = 50 , C iss = 6 pF, C rss = 2 pF, g m = 3 mS. Find the upper critical frequency for the input and output RC circuits. C gd = C rss = 2 pF; C gs = C iss - C rss = 6 - 2 = 4 pF A v = g m (R D //R L ) = -3 mS x (5k//10k) = -10 C in(Miller) = C gd ( |A v | + 1) = 2 (10 + 1 ) = 22 pF C in(tot) = C gs + C in(Miller) = 4 + 22 = 26 pF f cu(input) = 1/(2  R s C in(tot) ) = 1/(2  x 50 x 26 pF) = 122.4 MHz C out(Miller) = C gd (( |A v | +1 ) / |A v | ) = 2((10+1)/10) = 2.2 pF f cu(output) = 1/(2  R d C out(Miller) ) = 1/(2  x 5k//10k x 2.2 pf) = 21.7 MHz 54) An amplifier with f cl = 1 kHz and f cu = 700 kHz is cascaded with another amplifier with f cl = 80 Hz and f cu = 250 kHz. What is the overall bandwidth? BW = f’ cu - f’ cl = 250 kHz - 1 kHz = 249 kHz

23. H. Chan; Mohawk College23 55) 3 amplifiers with the same f cl = 250 Hz and f cu = 50 kHz are cascaded together. Find the overall bandwidth. = 25.48 kHz = 490.6 Hz Overall BW = f’ cu - f’ cl = 25.48 - 490.6 = 24.99 kHz 56) The rise and fall times for an amplifier in response to a step voltage input are 10 ns and 1.2 ms respectively. Find f cl and f cu. f cl = 0.35 / t f = 0.35 / 1.2 ms = 291.7 Hz f cu = 0.35 / t r = 0.35 / 10 ns = 35 MHz 57) Calculate the line regulation in %/V of a regulator whose output at 20 V increases by 0.2 V when its input increases by 6 V. Line regulation = (  V out x 100)/(  V in x V out ) = 0.17 %/V

24. H. Chan; Mohawk College24 58) A voltage regulator has an output of 24 V at no load. The output drops to 23.5 V when a current of 30 mA is drawn. What is the load regulation as a percentage and as %/mA? Load regulation = (V NL - V FL ) x 100 / V FL = 2.13 % Load regulation = (V NL - V FL ) x 100 / (V FL x I FL ) = 0.071 %/mA 59) Given: V Z = 15 V, R L = R = 100 , h FE = 100, and V in = 18 V. Find I L, and I ZT. Q1Q1 V in R RLRL VZVZ VLVL I L = (V Z - V BE ) / R L = (15 - 0.7) / 100 = 143 mA I R = (V in - V Z ) / R = (18 - 15) / 100 = 30 mA I ZT = I R - I B = I R - I L /h FE = 30 - 1.43 = 28.57 mA 60) If the same component values are used for a basic shunt voltage regulator, except R S = 10 , find I L, and I E. I L = (V Z + V BE ) / R L = (15 + 0.7) / 100 = 157 mA I Rs = [V in - (V Z +V BE )] / R S = [18 - 15.7] / 10 = 230 mA So, I E = I rs - I L = 230 - 157 = 73 mA