1. Federal University of Santa Catarina - UFSC Post-graduation in Electrical Engineering - PPGEEL Study and Design of a Voltage Line Conditioner with Serial Compensation and Fed by Load Side July, 2007 Master Thesis Presentation: Power Electronics Institute - INEP Eng. MSc Thiago Batista Soeiro

2. Presentation Contents Introduction Introduction Voltage Line Conditioner: Power Stage Voltage Line Conditioner: Power Stage Voltage Line Conditioner: Control Stage Voltage Line Conditioner: Control Stage Experimental Results Experimental Results Conclusions Conclusions

3. Motivations 2- The existence of standards limiting the harmonic pollution in electric power system; 1- The increase of voltage-sensitive equipments results in greater demand for high-quality voltage sources; 3- To aid the national industries in the development of high-quality voltage sources.

4. 3- To evaluate the performance of the topology proposed under unbalanced and distorted system voltages; Main Objectives 4- To study and formulate control techniques to provide the conditioning of the load voltage 5- To develop and test a voltage line conditioner prototype to validate the analysis. 2- To establish general voltage compensation methods to be applied in voltage line conditioners; 1- To study concepts and topologies of voltage line conditioners;

5. The Principle of Serial Voltage Compensation, applied in Stabilizers in 1950 by Patchett The Principle of Serial Voltage Compensation, applied in Stabilizers in 1950 by Patchett The Studied Topology was based on two concepts: Indirect ac-ac Converter with Direct link presented by Bong- Hwan Kwon in 2002 Important Concepts

6. The Voltage Line Conditioner Operation Principle: Important Concepts

7. Voltage Line Conditioner: Power Stage Power Stage

8. Modulation Strategy Bidirectional Rectifier (S 1 - S 4 ) PWM Inverter (S 5 - S 8 )

9. Main Waveforms 3 Level PWM Modulation Rectifier Inverter

10. Main Analytical Expression Converter’s Static Gain Voltage ripple Transformation ratio Current ripple

11. Voltage Line Conditioner: Control Stage

12. Mathematical Model Small signals model: Small signals model: G(s), Transfer Function of output voltage vs. duty cycle; F(s), Transfer Function of output voltage vs. input voltage.

13. Conditioner Analytical Study Load Influence over circuit’s dynamic response: Load Influence over circuit’s dynamic response:

14. There are some strategies to damp the voltage oscillation or compensate the absence of load: To damp voltage oscillation with virtual resistance control strategy; To damp voltage oscillation with virtual resistance control strategy; To insert a control loop to compensate abrupt voltage drop; To insert a control loop to compensate abrupt voltage drop; To insert input filter topologies; Conditioner Analytical Study