1. Assembly and Packaging

2. Assembly and Packaging Technical Working Group – 2010 (93 Participants)
Joseph Adam, Sai Ankireddi, Bernd Appelt, Richard Arnold, Muhannad S. Bakir, Souvik Banerjee, Rozalia Beica, Steve Bezuk, Mario Bolanos-Avila, W.R. Bottoms, Yi-jen Chan, Chi-Shih Chang, Clinton Chao, Carl, Chen, William Chen, Sonjin Cho, Yulkyo Chung, Bob Chylak, Mark De Samber, Krishor Desai, Dan Evans, Bradford Factor, Tatsuhiro Fujiki, Michael Gaitan, Michel Garnier, Steve Greathouse, Tom Gregorich, Richard Grzybowski, George Harman, Shuhya Haruguchi, Ryo Haruta, Tomoo Hayashi, Harold Hosack, Willem Hoving, Mike Hung, John Hunt, Kazuyuki Imamura, Hisao Kasuga, Dan Kilper, Mitchitaka Kimura, Shoji Kitamura, Takanori Kubo, Choon Heung Lee, Ricky S W Lee, Rong-Shen Lee, Russell Lewis, Sebastian Liau, Weichung Lo, David D. Lu, Abhay Maheshwan, Debendra Mallik, Kaneto Matsushita, Masao Matsuura, Lei Mercado, Hirofumi Nakajima, Keith Newman, Luu Nguyen, John Osenbach, Masashi Otsuka, Richard F. Otte, Gilles Poupon, Klaus Pressel, Gamal Refai-Ahmed, Charles Richardson, Peter Robinson, Bernd Roemer, Gurtej Sandu, Naoto Sasaki, Paul Siblerud, Vern Solberg, Simon Stacey, Yoshiaki Sugizaki, Teresa Sze, Coen Tak, Takashi Takata, Patrick Thompson, Claudio Truzzi, Andy Tseng, Shigeyuki Ueda, Shoji Uegaki, Ryosuke Usui, Henry Utsunomiya, Kripesh Vaidyanathan, Freek Van Straten, Julien Vittu, James Wilcox, Max Juergen Wolf, Jie Xue, Zhiping Yang, Hiroshi, Yokota, Eiji Yoshida, Hiroyoshi Yoshida.

3. Assembly and Packaging Technical Working Group - 2010
87 Members Participated in 2010 Activities
Focus of activities for 2010
The only change to tables will be AP1: Difficult Challenges
Preparation for 2011 with expanded coverage for:
Medical electronics,
3D integration
Interposers
Automotive electronics
Optoelectronics
Printed electronics
Handling of thinned wafers and die
Embedded components
MEMS integration
Rewrite of the System in Package paper
Cross TWG coordination
Major collaborations include ERM, ERD, ESH, Interconnect, Design, Test
Coordination with other Roadmaps
iNEMI
CTR/MPC
JISSO

4. The Pace of Innovation is Accelerating
Today packaging has become a crucial enabler for both “More Moore” as the industry enters the deep submicron regime and the functional diversification and heterogeneous integration which has been titled “More than Moore”. In response to these dual challenges we have an unprecedented pace of innovation in assembly and packaging technologies.

5. Innovation in Wafer level Packaging
WLCSP and Wafer Level Fan-Out technologies have become main stream. Future directions will be include multi-die (side by side and stacking) fanout. They are becoming an enabling part of the SiP technology portfolio providing:
Miniaturization
lower power
cost reduction
heterogeneous integration
Examples include complex PoPs, embedded components, integrated passives, and others.

6. Future Directions in Wafer level Packaging

7. Progress Continues in Wire Bond Technology
The rising cost of gold is driving copper wire bonding to replace gold. Conversion from gold wirebond packages to copper requires:
Changes in almost all materials and wirebond equipment
New process engineering
New reliability science to addressing new failure mechanisms
Fine Pitch Copper wire bonds are now in volume production

8. 3D Stacking with Wirebonds
3D wirebond stacking with 50um thick wafer

9. Lead Free Requirements Demands New Interconnect Technology
Copper pillar has become the lead free bump metallurgy of choice for the fine bond pad pitch at deep submicron nodes. The technical challenges include:
New underfill materials
New processes for cu pillar and under bump metallurgy (UBM)
Design tools for copper pillar interconnect
This must be accomplished while maintaining adequate margins of safety for dielectric damage and package integrity.

10. Copper Pillar Array

11. Expanded Coverage of Emerging Requirements for 2011: Medical Electronics
Medical electronics Categories to be addressed:
Portable medical electronics
Implantable medical electronics (Parkinson’s disease symptom control)
Selected Issues for Medical electronics
Power requirements: energy scavenging; wireless radiated power; batteries
Safety issues (voltage, biocompatibility, power delivery)
FDA certification
Reliability requirements
Environmental issues
Connectivity (wireless)
Optical components (cameras)
Microfluidics
Implantable micro-robotics
Sensors
MEMS

12. Expanded Coverage of Emerging Requirements for 2011: 3D Integration
Selected Issues for 3D Integration
Die stacking methods
Homogeneous stacking
Heterogeneous stacking
Test challenges for 3D
Test access
Test cost
Through silicon Vias
Thermal management for 3D structured
Power integrity
3D SiP
Bonding methods
Codesign and simulation

13. Expanded Coverage of Emerging Requirements for 2011: Interposers
Selected Issues for Interposers:
Systems integration for 2D and 3D
Interposer features
Redistribution wiring
Passive networks
Thermal management
Stress management
Materials selection Si
Ceramic
Glass
Organics

14. Expanded Coverage of Emerging Requirements for 2011: Automotive Electronics
Automotive electronics Categories to be addressed:
Internal combustion
Hybrid
All electric
Selected Issues
Communications (including optical networks)
Thermal management
In cabin
Hostile environments
Safety
Sensors
Controls for improved efficiency
Cost
One side air cooling
Cooling on both sides
Liquid immersion cooling

15. Expanded Coverage of Emerging Requirements for 2011: Thin Wafer and Die Handling
Selected Issues for Thin Wafer and Die Handling
Testing: contactors with ohmic contact without damage
Holding mechanisms
Electrostatic chucks
Bernouilli chuck
Temporary bonding (sacrificial layer)
Vacuum chucks (porous ceramic chucks)
Dicing of thin wafer
Warpage

16. Expanded Coverage of Emerging Requirements for 2011: Embedded Components
Embedded Component Categories to be addressed:
Active devices
Passive devices
Selected Issues for Embedded Components
Performance enhancement due to reduced distance between die and passives
Incorporation of additional functionality (heat pipes; wave guides)
Keep out area around embedded components
Charge source close to the die for current surge
Reduced size by placement of passives under die
Placement accuracy for small thinned die
3D alignment tolerance for assembly
Improved resistance to shock
Thermal management

17. Expanded Coverage of Emerging Requirements for 2011: MEMS Integration
MEMS Integration Categories to be addressed:
Sensors
Accelerometers
RF Switches, Oscillators, and filters
Microfluidics
Optical
Selected Issues for MEMS Integration
Low stress interconnect between MEMS device and package cavities
Low cost, high reliability mechanical mounting
Electrical and environmental connections
low electrical parasitic interconnect
Low cost hermetic cavities
Stress management
Microfluidic pump

18. Difficult Challenges

19. Difficult Challenges

20. Difficult Challenges

21. Thank You