Download presentation
Presentation is loading. Please wait.
Published byTyrone Dorsey Modified over 9 years ago
1
2.5Gbps jitter generator Part 1 final presentation
2
What is jitter? By definition, jitter is the short term variation of the significant instants of a digital signal from their ideal positions in time.
3
How does jittered signal look like?
4
Components of a jitter :random jitter and deterministic jitter Random jitter is generally assumed to follow a Gaussian distribution which is characterized by a mean, and width. Deterministic jitter is limited, and is determined by its peak-to-peak value,.
5
Jitter measurement :eye diagrams
6
Why jitter is important?
7
The probability that the edge crosses the sampling point, causing a bit error, follows Gaussian distribution. The mean value is determined by the deterministic jitter component.
8
Jitter generation Random jitter is generated from the accumulation of random processes including thermal noise and shot noise. Deterministic jitter is the jitter generation from a variety of systematic effects. The causes include duty-cycle distortion (DCD), intersymbol interference (ISI), sinusoidal or periodic jitter (PJ) and crosstalk.
9
DCD example
10
ISI example
11
Crosstalk example
13
Eye diagram definitions
14
Effect of random jitter on BER budget
15
Jitter and BER budget : Assume we want to get BER of This means
16
Jitter transfer and jitter tolerance Jitter transfer measures the clock recovery performance of a network or network element as a function of jitter frequency. It is measured by applying sinusoidal jitter of specified amplitude and frequency, to the data and measuring the output jitter amplitude at that frequency, The jitter transfer is given by
17
Jitter tolerance Jitter tolerance measures the ability of a device or system,primarily at the receiving end, to track large amounts of jitter without degrading the BER. It is the amplitude of sinusoidal jitter applied to a device that results in anequivalent 1 dB reduction in sensitivity. The measurement is performed by first measuring the BER of the Device Under Test (DUT) without applied jitter. The signal poweris attenuated until the onset of errors or until a specified BER, typically, is exceeded …
18
Jitter tolerance (continued) The attenuation is reduced 1 dB and the signal is transmitted with appliedsinusoidal jitter imposed on the clock. The jitter amplitude is increased until the onsetof errors or the specified BER is exceeded. The resulting jitter amplitude is the jitter tolerance at that frequency, Jitter tolerance and transfer are primarily of interest inSONet/SDH/OTN applications.
19
Jitter transfer masks
20
Test system block diagram
21
Jitter Generator schematic: input structure
22
AC coupling (RocketIO termination voltages are ) End termination of differential line DC rebias Capacitive bypass filtering of reference voltage VBB
23
output structure: ECL to CML translator / buffer 1:2
24
Connection to controller
25
lvcmos to lvpecl logic levels translator for LEN signal
26
Jitter Budget Calculation How much internal jitter do we generate? NB4N11M DJ = 20ps NB4N11M RJ (rms) = 1ps SY100EP195 DJ = 25ps (DCD) SY100EP195 RJ (rms) = 0.2ps RocketIO TX DJ = 15 ps (DCD) Plus the jitter following from the ac- coupling, as well as low-pass effects (ISI). This amount will be estimated from Hyperlynx simulation
27
Jitter Budget Calculation
28
How to apply jitter modulation frequency? Modulation frequency is controlled by the rate of change of a digital control word to programmable delay chip. Since the highest modulation frequency of interest in the SONET OC-48 mask is about it’s sufficient to change delays at about 50-100MHz, to rich specification frequency range
29
Example of periodic jitter generation
Similar presentations
© 2024 SlidePlayer.com. Inc.
All rights reserved.