1. EKT 221/4 DIGITAL ELECTRONICS II  Registers, Micro-operations and Implementations - Part2

2. HIGH LEVEL LANGUAGE Example : C+, VB, JAVA ASSEMBLY LANGUAGE Example : uP and uC OPCODE MICROCODE Mircocode (Micro-operations): Operations executed on data stored in registers, performed in one clock cycle Register Transfer Level (RTL): Symbolic notation used to describe micro-operations Register Transfer Level (RTL)

3. RTL  an algebraic notation used to define machine level operations  it is not executed by a computer  used to explain how the computer works. Example: In 68000 assembly language instruction ADD#3, D2 is define in RTL as [D2] [D2] + 3 Register Transfer Level (RTL)

4. Types of Registers  AR (Address Registers)  DR (Data Registers)  PC (Program Counters)  IR (Instruction Registers)  Rn (n indicates the Register number, eg R2)

5. Block Diagram of Registers R PC(H) Register 16 bit Register 7 8 bit Register 6543210 Bit 7Bit 0 15141312111098 76543210 Bit 16 Bit 0 PC(L) 8 bit = 1 byte H = High order byte L = Low order byte PC(H) = PC(15:8) PC(L) = PC(7:0)

6. Basic Symbols  R followed by a number is referring to a register: R2 = second register/register no 2 R2

7.  M refers to Memory with addresses in square braces: Direct Addressing : M[10] = contents of memory address 10 In this example, M[10] refers to 10111011 10000000 10111011 11111111 9 10 11 AddressContent MEMORY Basic Symbols

8.  M refers to Memory with addresses in square braces In-direct Addressing : M[R3] = content of the memory address in R3 10000000 10111011 11111111 15 16 17 AddressContent MEMORY 10000000 00000110 00001111 1 2 3 AddressContent REGISTER 00001111 = 15 Ans : M[R3] refers to 10000000 Basic Symbols

9.  Arrow pointing to the right shows transfer of data : R4 R3 = Stores the value of R3 to R4 * The word transfer is misleading, since it implies that data is moved from one location to another. In fact, the data is copied from one location to another since it also still resides in register R3 Basic Symbols

10.  A comma represents simultaneous transfer: R1 R2, R6 R7 = Stores R2 into R1 and at the same time stores R7 into R6. Basic Symbols

11.  Parenthesis indicates part of the register. R8(1) = bit 1of R8 R8 76534210 10111000 Bit Position Content MSB LSB LSB : Least Significant Bit MSB : Most Significant Bit Basic Symbols

12.  Parenthesis indicates part of the register. R3(7:0) = the least significant byte of R3 Note : 1 byte = 8 bit R3 76534210 10111000 14..9158 1 0..1 Basic Symbols

13. Mathematical and Logical Symbols  Addition is indicated by the + sign: R1 R2+R3 Add R2 and R3, stores in R1 R2 R4+R1 Add R4 and R1, stores in R2 Example 1 : Example 2 :

14.  Subtraction is handled not with the minus sign but with complementing.  1’s complement :  2’s complement : R5R3+R4 R5R3+R4+1 R3 minus R4 in 1’s complement R3 minus R4 in 2’s complement Mathematical and Logical Symbols

15.  EXERCISE: Minus R2 from R1 and stores the answer in R8 (use 2’s comp method) RTL : R8 R1+R2+1 What is the value of R8 if R1 = 01000100 and R2 = 00100011. Mathematical and Logical Symbols

16. Summary SymbolDescriptionExample Square bracketsSpecifies an address for memory M[R2] LettersDenotes a registerAR, IR, PC, R2 ParenthesesDenotes part of a register R2(1), R2(7:0), PC(L) ArrowDenotes Transfer of dataR1 R2 CommaSeparates simultaneous transfers R1 R2, R3 R2

17. Arithmetic Operations  + Addition  - Subtraction  * Multiplication  / Division Example:R2R1+R2 Example:R2R1+R2+1 Example:R2R1*R2 Example:R2R1/R2

18. Conditional Register Transfer  Conditional Statement  Using control signal to control the transfer  Can be symbolised by if-then statement If (K1 = 1) then (R2 R1)  In RTL we can write it as: K1 : R2 R1 A subscripted letter followed by a colon is a conditional

19. Conditional Register Transfer R2 R1 K1K1 CLK n K1K1 Transfer occurs here n = no of lines = no of bits Transfer occurs in parallel K 1 : R2 R1

20. Conditional Register Transfer  Content of R2 will be stored in R5 when condition K 1 occurs: R5 R2 K K1 :R5 R2 Example:

21. Summary Note : Any register may be specified for source 1, source 2, or destination.

22. Logical Operations  v OR (SETS Bits)  ^ AND (CLEARS Bits)  + EXOR (Complement Bits, 2 Sources)  NOT (Complement Bits, 1 Source) Example:R3R4 v R6 Example:R2DR ^ R1 Example:PCPC + DR Example:R6R1

23. Logical Operations Example:  Let R1 = 10101010 and R2 = 11110000  After the operations, R0 becomes:

24. Shift Operations  To Shift left and shift right operations:

25. Shift Operations Example 1:  Let R2 = 11001001  After the Shift operation, R1 becomes: Note: These shifts "zero fill". Sometimes a separate flip- flop is used to provide the data shifted in, or to “catch” the data shifted out

26. Shift Operations  Example 2 : shift left operation P : R1 sl R1 If R1 = 1001, then sl R1 = 0010 sr R1 = 0100 R1 3 R1 2 R1 1 R1 0 0 P Zero Fill

27. Assignment#1 Given the 16-bit operand 0010 0111 1011 1010, what operation must be performed and what operand must be used: a)to clear all even bit positions to 0? (Assume bit positions are 15 through 0 from left to right) b) to set the leftmost 4 bits to 1? c) to complement the centre 8 bits?

28. Thank you