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Ultra-precision engineering in lithographic exposure equipment for the semiconductor industry by Robert-H. Munnig Schmidt Philosophical Transactions A.

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Presentation on theme: "Ultra-precision engineering in lithographic exposure equipment for the semiconductor industry by Robert-H. Munnig Schmidt Philosophical Transactions A."— Presentation transcript:

1 Ultra-precision engineering in lithographic exposure equipment for the semiconductor industry by Robert-H. Munnig Schmidt Philosophical Transactions A Volume 370(1973):3950-3972 August 28, 2012 ©2012 by The Royal Society

2 Integrated circuit production flow, starting with a mono-crystalline silicon ingot, cut into thin slices (wafers) that undergo a multitude of chemical treatments, where all dimensions are determined by the optical exposure system at step 5. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

3 The smallest details (CD) that can be imaged by a wafer scanner are determined by the numerical aperture (NA) of the imaging system. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

4 State-of-the-art wafer scanner from ASML indicating the main functional modules for exposing a wafer. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

5 The scanning principle of a wafer scanner. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

6 The requirements on overlay follow a trend that outpaces Moore’s Law. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

7 Several measures are taken to avoid dynamic problems in modern wafer scanners. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

8 Active ‘skyhook’ damping in a vibration isolation system avoids the transmission of external vibrations through the damper. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

9 Electromagnetic Lorentz type actuator. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

10 A long-stoke, short-stroke positioning stage in an H-configuration, where the actuator forces all act in the plane of the centre of mass of the wafer table. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

11 The forces acting on a coil, positioned in the magnetic field above an array of alternating permanent magnets. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

12 The alignment marks are diffraction gratings with a different periodicity to increase the capture range. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

13 The required depth of focus as a function of the critical dimension. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

14 The process steps in a dual stage wafer scanner between loading and unloading consist of two cycles. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

15 By curving the image plane, the image can be made to better conform to the local curvature of the wafer. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

16 Two methods for long-range incremental position measurement. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

17 The combination of (a) the H-configuration with the laser interferometer measurement system and (b) the plane encoder with the planar actuation system clearly illustrate the differences. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

18 The position control of the wafer stage is a SISO six-axis PID-control system. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society

19 Cross section of a CMOS logic microprocessor IC of IBM, showing 20 nm width vacuum chambers as insulator for reduced dielectric losses, created by a ‘self assembly’ process. Robert-H. Munnig Schmidt Phil. Trans. R. Soc. A 2012;370:3950-3972 ©2012 by The Royal Society


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