1. 1 CHAPTER 4: PART I ARITHMETIC FOR COMPUTERS

2. 2 The MIPS ALU We’ll be working with the MIPS instruction set architecture –similar to other architectures developed since the 1980's –used by NEC, Nintendo, Silicon Graphics, Sony Below is the Interface Representation of an ALU 32 operation result a b ALU

3. 3 Numbers Bits are just bits (no inherent meaning) –conventions define relationship between bits and numbers Binary numbers (base 2) 0000 0001 0010 0011 0100 0101 0110 1000 1001... For an n-bit representation: The decimals represented: 0...2 n -1 Of course it gets more complicated: Numbers are finite (possibility of overflow) How can fractions and real numbers be represented? How can negative numbers be represented? We will consider the representation of negative numbers.

4. 4 Possible Representations UnsignedSign MagnitudeOne’s Compliment signed Two’s Compliment signed 000 = 0000 = +0 001 = 1001 = +1 010 = 2010 = +2 011 = 3011 = +3 100 = 4100 = -0100 = -3100 = -4 101 = 5101 = -1101 = -2101 = -3 110 = 6110 = -2110 = -1110 = -2 111 = 7111 = -3111 = -0111 = -1 Works on positives only Addition ComplicatedZero not uniqueZero unique Issues: balance, number of zeros, ease of operations Two’s compliment best to represent signed integers.

5. 5 Converting between positive decimal and binary Convert decimal 49 to 8-bit binary: 49/2 = 24 r 1 24/2 = 12 r 0 12/2 = 6 r 0 6/2 = 3 r 0 3/2 = 1 r 1 1/2 = 0 r 1 Now read the remainders from bottom to top: the binary equivalent is 110001. In 8 bit form, it is: 0011 0001. In 16 bit form it is: 0000 0000 0011 0001 It is very easy to convert from a binary number to a decimal number. Just like the decimal system, we multiply each digit by its weighted position, and add each of the weighted values together. For example, the binary value 0100 1010 represents:

6. 6 Converting between negative decimal and binary Convert decimal -50 to 8-bit binary. –Convert 50 to binary: Now read the remainders from bottom upwards 50 = 110010 –Extend to 8 bits: 0011 0010 –Invert bits: 1100 1100 –Add 1: -50 = 1100 1101 Answer is 1100 1101 Convert 1101 1011 to decimal. –Invert bits: 0010 0100 –Add 1: 0010 0101 –Convert to decimal: Final answer = -37. Get 2’s compliment

7. 7 Two’s Complement Number System Take 8 bit binary: 0 = 0000 0000 1 = 0000 0001 -1 = 1111 1111 2 = 0000 0010 -2 = 1111 1110 3 = 0000 0011 -3 = 1111 1101 ? = 0111 1111 ? = 1000 0000 Largest positive = 2 8 /2 – 1 Smallest negative = - 2 8 /2

8. 8 MIPS 32 bit signed numbers: 0000 0000 0000 0000 0000 0000 0000 0000 two = 0 ten 0000 0000 0000 0000 0000 0000 0000 0001 two = + 1 ten 0000 0000 0000 0000 0000 0000 0000 0010 two = + 2 ten... 0111 1111 1111 1111 1111 1111 1111 1110 two = + 2,147,483,646 ten 0111 1111 1111 1111 1111 1111 1111 1111 two = + 2,147,483,647 ten 1000 0000 0000 0000 0000 0000 0000 0000 two = – 2,147,483,648 ten 1000 0000 0000 0000 0000 0000 0000 0001 two = – 2,147,483,647 ten 1000 0000 0000 0000 0000 0000 0000 0010 two = – 2,147,483,646 ten... 1111 1111 1111 1111 1111 1111 1111 1101 two = – 3 ten 1111 1111 1111 1111 1111 1111 1111 1110 two = – 2 ten 1111 1111 1111 1111 1111 1111 1111 1111 two = – 1 ten

9. 9 Addition & Subtraction (4 bit word) Using the regular algorithm for binary addition, add (5+12), (-5+12), (-12+-5), and (12+-12) in Two's Complement system. Then convert back to decimal numbers. 5+12-5+12-12+-512+-12 00000101 00001100 00010001 11111011 00001100 00000111 11110100 11111011 11101111 00001100 11110100 00000000 177 - 17 0

10. 10 Examples Convert 37, -56, 2, -5 into 8 bit 2’s compliment: Convert the 8-bit signed binary to decimal: (a) 0010 0110(b) 1001 1011(c) 0110 1111 Carryout the addition by first converting into 8 bits 2’s compliment numbers: (a) 89+23(b) 49-23(c) 5+56

11. 11 Detecting Overflow No overflow when adding a positive and a negative number No overflow when signs are the same for subtraction Overflow occurs when the value affects the sign: –overflow when adding two positives yields a negative –or, adding two negatives gives a positive –or, subtract a negative from a positive and get a negative –or, subtract a positive from a negative and get a positive Consider the operations A + B, and A – B –Can overflow occur if B is 0 ? –Can overflow occur if A is 0 ? Detection of overflow in signed bit addition: Carry in into most significant bit ≠ carry out.

12. 12 Boolean Algebra and logic gates Transistors inside a modern computer are digital with two values 1, 0 (high and low voltage: asserted or de-asserted). Boolean variable: Takes only two values - true (1), false (0). proposition : In formal logic, a proposition (statement) is a declarative sentence that is true or false. Boolean operators: Used to construct propositions out of other propositions. Gates: Hardware implementing basic Boolean operators. The basic gates are NOT (negation), AND (conjunction), OR (disjunction). Boolean algebra: Deals with Boolean (logical) variables and logic operations operating on those variables. A Boolean function can be expressed algebraically with: –Binary variables; –Logic operations symbols; –Parentheses; –Equal sign.

13. 13 Boolean Algebra and logic gates Truth tables: All possible values of input determine various values of outputs. These values can be represented using a truth table. Logic diagram: Composed of graphic symbols for logic gates. Represents Boolean functions. To represent a function with n binary variables, we need a list of 2 n combinations. Logic blocks are physical components: –Combinational: Without memory. The output depends only on the current input. –Sequential: Have memory (state). The output and state depend on the input and state.

14. 14 Truth tables of operators and Logical Gates Gates: AND, OR, NAND, NOR, XOR. a AND b = ab a OR b = a+ba NAND b = ab a NOR b = a+b a XOR b = a b

15. 15 Truth table for expressions

16. 16 Proving identities using truth tables

17. 17 Basic Identities of Boolean Algebra

18. 18 Proving Boolean identities using algebra Boolean identities can be used to simplify expressions and prove identities.

19. 19 Sum of Products Given any Boolean expression, one can draw a truth table. Given any truth table with inputs and outputs, can one get a Boolean expression of each output in terms of the inputs corresponding to the truth table? Example: What is the formula of output A in terms of inputs x, y, and z? First answer: Sum of Products Formula xyzA 0001 0010 0101 0111 1000 1010 1100 1111

20. 20 Sum of Products Consider inputs: x, y, z; outputs F, G The sum of products formulae for outputs F and G are: xyzFG 00001 00110 01000 01100 10011 10110 11011 11111

21. 21 Programmable Logical Arrays, PLAs A PLA is a customizable AND matrix followed by a customizable OR matrix. It directly implements a sum of products formula.

22. 22 Karnaugh-maps (K-maps) K-maps are used to simplify sum of products logical formulas (with 2, 3, or 4 inputs) using the truth table. K-map approach is to minimize the number of product terms Programs exists to simplify more complicated formulas A K-map for 2 inputs: x, y Why the need for simplified formulas? Smaller and thus cheaper logical components.

23. 23 Example xyA 001 011 100 110

24. 24 K-maps for 3-4 inputs

25. 25 Examples: 3 input K-maps xyzFGHJ 0000100 0011000 0100000 0110000 1001110 1011001 1101110 1111101

26. 26 Examples: 3 input K-maps The outputs simplify to:

27. 27 Examples: 4 input K-maps

28. 28 Combining Gates y Circuits for output functions: Output = x + yz, Output = x + yz and Output = (x +y)(x + z) z x Output = x + yz x z y x x y z Output = (x +y)(x + z)

29. 29 Multiple Inputs We can construct a multiple-input gate consisting of many AND gates (or one with many OR gates). Due to the Associatively law, the order with which the gates are operated is not important. The output of a multiple-input AND gate is 1 only if all the inputs are. The output of a multiple-input OR gate is 1 if any of the inputs is 1. We can also place multiple inputs to other gates such as the NAND, NOR or XOR gates. The multiple gates XOR gates indicates 1 of the number of 1’s of odd and 0 if the number of 1’s is even. This feature can be used in error detection devices.

30. 30 Multiple Inputs

31. 31 Design of a computer component. Technology => Performance Transistor CMOS Logic Gate Wires Complex Cell

32. 32 Basic Technology: CMOS CMOS: Complementary Metal Oxide Semiconductor –NMOS (N-Type Metal Oxide Semiconductor) transistors –PMOS (P-Type Metal Oxide Semiconductor) transistors NMOS Transistor –Apply a HIGH (Vdd) to its gate turns the transistor into a “conductor” –Apply a LOW (GND) to its gate shuts off the conduction path PMOS Transistor –Apply a HIGH (Vdd) to its gate shuts off the conduction path –Apply a LOW (GND) to its gate turns the transistor into a “conductor”

33. 33 Basic Components: CMOS Inverter Inverter Operation OutIn NOT Symbol (Inverter) OutIn Vdd Out Open Discharge Open PMOS NMOS. Out

34. 34 Basic Components: CMOS Logic Gates NAND Gate NOR Gate Vdd A B Out Vdd A B Out A B A B AB 001 011 101 110 AB 001 010 100 110

35. 35 Boolean Function Example Problem: Consider a logic function with three inputs: A, B, and C. Output D is true if at least one input is true Output E is true if exactly two inputs are true Output F is true only if all three inputs are true Show the truth table for these three functions. Show the Boolean equations for these three functions. Show an implementation consisting of inverters, AND, and OR gates.

36. 36 Boolean Function Example Inputs: A, B. C; Outputs: D, E, F D is true if at least one input is true. E is true if exactly two inputs are true. F is true if all the inputs are true. The truth table will contain 2 3 = 8 entries

37. 37 Boolean Function Example: PLA Abbreviated PLA

38. 38 Boolean Function Example The Boolean Functions corresponding to the outputs above are: The equation for D: D = A + B + C The equation for F: F = ABC The equation for E:

39. 39 The Multiplexor Selects one of the inputs to be the output, based on a control input If (S = = 0) C = A else C = B S C A B 0 1 note: we call this a 2-input mux even though it has 3 inputs! Or a 1-select multiplexor.

40. 40 Implementing a 2-input multiplexor

41. 41 The 1 bit Logical Unit for AND and OR b a 1 0 Result Operation

42. 42 The Multiplexor with 2 selects if (S == 00) Out = A else if (S == 01) Out = B else if (S == 10) Out = C else if (S == 11) Out = D 2 A B C D Out S 0 1 2 3

43. 43 Designing a Full Adder Binary addition is done with carries from right to left Input and output specification for a 1-bit adder

44. 44 Designing a Full Adder From the sum of products formula, the Sum is: The sum of products formula for CarryOut can be simplified to give: One can design a Full Adder circuit with Inputs = a, b, CarryIn Outputs = Sum, CarryOut We will abstract this Full Adder circuit as  + b a CarryOut Sum CarryIn