2. Outline Analysis of Combinational Circuits Signed Number Arithmetic
Binary Adder-Subtractor
Binary Multiplier
Magnitude Comparator
Decoders
Encoders
Multiplexers
Three-state Gates

3. Analysis of Combinational Circuits
Given a combinational circuit diagram determine the function of the circuit.
Label all gate outputs with arbitrary symbols. Determine the functions for each gate output.
Repeat the process until the function for the outputs are obtained.
Substitute the functions for arbitrary symbols until out functions are expressed in terms of input variables.

4. Combinational Circuit Analysis

5. Combinational Circuit Analysis

6. Combinational Circuit Design
Given a specification for the circuit:
Determine the number of inputs and outputs
Derive the truth table for the output functions
Obtain simplified Boolean functions for each output
Draw the logic diagram using gates and verify the design (simulation, manually)

7. Combinational Circuit Design Example 1
Problem: Number-of-1s Counter
Design a circuit that counts the number of 1s present on three inputs a,b,c and outputs that number in binary using two outputs, y and z.
abc=001  yz=01
abc=011  yz=10

8. Combinational Circuit Design Example 1

9. Combinational Circuit Design Example 1
y=ac+bc+ab
z is an odd-function

10. Combinational Circuit Design Example 2
Implement a circuit that can detect (output=1) whether a pattern of at least three adjacent 1’s occur anywhere in a an 8-bit input.
if input abcdefgh= output=1.
if input abcdefgh= output=0.
if input abcdefgh= output=1.

11. Combinational Circuit Design Example 2
Truth Table for Pattern Detector
There are 8 input variables. The truth table will have 2^8=256 rows.
In this case try the to find equation that lists the possible occurrences of three 1s in a row.
Output z=abc+bcd+cde+def+efg+fgh

12. Combinational Circuit Design Example 2

13. Combinational Circuit Design Example 3
Problem: Convert BCD code to Excess-3

14. Combinational Circuit Design Example 3

15. Combinational Circuit Design Example 3

16. Combinational Circuit Design Example 3

17. Half Adder
X + Y = C S

18. Half Adder Verilog

19. Half Adder Verilog
Using XOR
Verilog 2001,2005 Syntax

20. Binary Adder - Subtractor

21. Binary Adder - Subtractor

22. Binary Adder - Subtractor
2-level AND-OR implementation

23. Binary Adder - Subtractor
Using 2 Half-Adders

24. Binary Adder - Subtractor
Verilog Description

25. Verilog Dataflow Modeling
Dataflow modeling uses assign statements for continuous assignment
The data type net is used to represent physical connection between circuit elements.
A net is declared by wire or by declaring an identifier to be an output port.
A continuous assignment assigns a value to a net.
assign Y=A & B specifies that output of an AND gate is connected to wire Y.

26. Verilog Operators

27. Binary Adder - Subtractor

28. 4-bit Binary Adder

29. Binary Adder Carry Propagation
Each gate generates a delay d called propagation delay.
Propagation delay in a circuit is delay of a gate times the number of gate levels.
In a full adder the input carry cin propagates to output carry cout through an AND gate followed by an OR gate.
One stage of a full adder generates 3d delay.
For four stages of a 4-bit full adder total delay is 4*3d=12d.

30. Carry Lookahead

31. Carry Lookahead Adder

32. Carry Lookahead
For a 4 bit adder

33. Carry Lookahead Generator

34. Carry Lookahead Adder

35. Signed Numbers
Signed number representation: Use most significant bit as sign bit .
If sign bit=0 number is positive sign bit=1 number is negative
Three types of signed number representation. For 8-bit number +9=
Sign Magnitude:
+9= =
Signed 1-s complement:
+9= =
Signed 2-s complement:
+9= =

36. Signed Addition and Subtraction
Add the numbers including the sign bits, discarding a carry out of the sign bits (2’s Complement)
The sign of the result is computed in step 1.
For subtraction in x – y use y, get –y

37. Overflow
If the numbers are unsigned overflow is the carry from most significant position.
If the numbers are signed
Result is different from what it is supposed to be  Then there is overflow
When carry into sign bit position and carry out are not equal

38. Binary Adder-Subtractor
Binary subtraction can be done by using complements. In the figure when M=0 S=A+B when M=1 S=A+(2^4-B)+1

39. Decoders
A decoder is a combinational circuit that converts binary information from n-input lines to a maximum of 2^n unique output lines.
Decoders are called n-to-m line decoders where m <= 2^n

40. Decoders

41. 4-to-16 Decoder using two 3-to-8 Decoders

42. Boolean Function Implementation using Decoders
Using a n-to-2n decoder and OR gates any functions of n variables can be implemented.
Example:
S(x,y,z)= Σ(1,2,4,7)
C(x,y,z)=Σ(3,5,6,7)
Functions S and C can be implemented using a 3-to-8 decoder and two 4-input OR gates

43. Implementation of S and C

44. Encoders An Encoder performs the inverse operation of a decoder.
Has 2^n or less input lines and n outputs.

45. Encoders Octal to binary encoder outputs x,y,z are:
x=D4 + D5 + D6 + D7
y=D2 + D3 + D6 + D7
z=D1 + D3 + D5 + D7
If more than one input is 1 there will be an ambiguity.
Usually a priority between inputs are set so that the code for the highest priority input is generated.

46. Priority Encoder
A priority encoder will assign priorities to its inputs. It will also have an output V =1 for valid inputs and V=0 for all inputs are 0.

47. Multiplexer
A multiplexer is a combinational circuit that selects information from one of many input lines and directs it to a single line.

48. 4x1 Multiplexer

49. Implement Boolean function using Multiplexer
Using a 4x1 multiplexer

50. Example
Using 8x1 multiplexer implement

51. Three State Gates
The tri-state gate acts as a switch opened or closed by the control input C.

52. Multiplexer with tri-state buffers

53. Chapter 4 - Summary Analysis of Combinational Circuits
Signed Number Arithmetic
Binary Adder-Subtractor
Binary Multiplier
Magnitude Comparator
Decoders
Encoders
Multiplexers
Three-state Gates